Set queue as preemptible or express for taprio. This will eventually set queue-specific preemptible field in TXQCTL register. A preemptible queue can only be set if it satisfies the conditions in igc_fpe_is_tx_preempt_allowed(), including the verification handshake condition. However, the handshake is optional, as users can disable the "verify_enabled" field, which the function also handles. Verified that the correct preemptible hardware queue is set using the following commands: a) 1:1 TC-to-Queue Mapping $ sudo tc qdisc replace dev enp1s0 parent root handle 100 \ taprio num_tc 4 map 0 1 2 3 0 0 0 0 0 0 0 0 0 0 0 0 \ queues 1@0 1@1 1@2 1@3 base-time 0 sched-entry S F 100000 \ fp E E P P b) Non-1:1 TC-to-Queue Mapping $ sudo tc qdisc replace dev enp1s0 parent root handle 100 \ taprio num_tc 3 map 0 1 1 1 2 0 0 0 0 0 0 0 0 0 0 0 queues 2@0 1@2 1@3 fp E P P Co-developed-by: Vinicius Costa Gomes <vinicius.gomes@xxxxxxxxx> Signed-off-by: Vinicius Costa Gomes <vinicius.gomes@xxxxxxxxx> Signed-off-by: Faizal Rahim <faizal.abdul.rahim@xxxxxxxxxxxxxxx> --- drivers/net/ethernet/intel/igc/igc.h | 2 +- drivers/net/ethernet/intel/igc/igc_defines.h | 1 + drivers/net/ethernet/intel/igc/igc_main.c | 36 ++++++++++++++++++++ drivers/net/ethernet/intel/igc/igc_tsn.c | 15 ++++++++ drivers/net/ethernet/intel/igc/igc_tsn.h | 1 + 5 files changed, 54 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/intel/igc/igc.h b/drivers/net/ethernet/intel/igc/igc.h index 56a426765be7..fc1960925e28 100644 --- a/drivers/net/ethernet/intel/igc/igc.h +++ b/drivers/net/ethernet/intel/igc/igc.h @@ -192,7 +192,7 @@ struct igc_ring { bool launchtime_enable; /* true if LaunchTime is enabled */ ktime_t last_tx_cycle; /* end of the cycle with a launchtime transmission */ ktime_t last_ff_cycle; /* Last cycle with an active first flag */ - + bool preemptible; /* True if not express */ u32 start_time; u32 end_time; u32 max_sdu; diff --git a/drivers/net/ethernet/intel/igc/igc_defines.h b/drivers/net/ethernet/intel/igc/igc_defines.h index ba96776d5854..33c2e4ce7cc8 100644 --- a/drivers/net/ethernet/intel/igc/igc_defines.h +++ b/drivers/net/ethernet/intel/igc/igc_defines.h @@ -557,6 +557,7 @@ #define IGC_TXQCTL_QUEUE_MODE_LAUNCHT 0x00000001 #define IGC_TXQCTL_STRICT_CYCLE 0x00000002 #define IGC_TXQCTL_STRICT_END 0x00000004 +#define IGC_TXQCTL_PREEMPTIBLE 0x00000008 #define IGC_TXQCTL_QAV_SEL_MASK 0x000000C0 #define IGC_TXQCTL_QAV_SEL_CBS0 0x00000080 #define IGC_TXQCTL_QAV_SEL_CBS1 0x000000C0 diff --git a/drivers/net/ethernet/intel/igc/igc_main.c b/drivers/net/ethernet/intel/igc/igc_main.c index e184959ef218..2787a91965d1 100644 --- a/drivers/net/ethernet/intel/igc/igc_main.c +++ b/drivers/net/ethernet/intel/igc/igc_main.c @@ -6216,6 +6216,39 @@ static bool is_base_time_past(ktime_t base_time, const struct timespec64 *now) return timespec64_compare(now, &b) > 0; } +static u32 igc_map_tc_to_queue(const struct igc_adapter *adapter, + unsigned long preemptible_tcs) +{ + struct net_device *dev = adapter->netdev; + u32 i, queue = 0; + + for (i = 0; i < dev->num_tc; i++) { + u32 offset, count; + + if (!(preemptible_tcs & BIT(i))) + continue; + + offset = dev->tc_to_txq[i].offset; + count = dev->tc_to_txq[i].count; + queue |= GENMASK(offset + count - 1, offset); + } + + return queue; +} + +static void igc_save_preempt_queue(struct igc_adapter *adapter, + const struct tc_mqprio_qopt_offload *mqprio) +{ + u32 preemptible_queue = igc_map_tc_to_queue(adapter, + mqprio->preemptible_tcs); + + for (int i = 0; i < adapter->num_tx_queues; i++) { + struct igc_ring *tx_ring = adapter->tx_ring[i]; + + tx_ring->preemptible = preemptible_queue & BIT(i); + } +} + static bool validate_schedule(struct igc_adapter *adapter, const struct tc_taprio_qopt_offload *qopt) { @@ -6302,6 +6335,7 @@ static int igc_qbv_clear_schedule(struct igc_adapter *adapter) ring->start_time = 0; ring->end_time = NSEC_PER_SEC; ring->max_sdu = 0; + ring->preemptible = false; } spin_lock_irqsave(&adapter->qbv_tx_lock, flags); @@ -6458,6 +6492,8 @@ static int igc_save_qbv_schedule(struct igc_adapter *adapter, ring->max_sdu = 0; } + igc_save_preempt_queue(adapter, &qopt->mqprio); + return 0; } diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.c b/drivers/net/ethernet/intel/igc/igc_tsn.c index 3d39be2219f3..efd2a9f676d8 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.c +++ b/drivers/net/ethernet/intel/igc/igc_tsn.c @@ -209,6 +209,17 @@ void igc_fpe_init(struct fpe_t *fpe) fpe->tx_min_frag_size = IGC_TX_MIN_FRAG_SIZE; } +static bool igc_fpe_is_verifed(const struct fpe_t *fpe) +{ + return (fpe->verify_enabled && fpe->verify_state == VERIFIED); +} + +bool igc_fpe_is_tx_preempt_allowed(const struct fpe_t *fpe) +{ + return (fpe->pmac_enabled && fpe->tx_enabled && + (igc_fpe_is_verifed(fpe) || !fpe->verify_enabled)); +} + void igc_fpe_verify_enabled_changed(struct fpe_t *fpe) { if (fpe->verify_enabled && fpe->tx_enabled) { @@ -539,6 +550,10 @@ static int igc_tsn_enable_offload(struct igc_adapter *adapter) if (ring->launchtime_enable) txqctl |= IGC_TXQCTL_QUEUE_MODE_LAUNCHT; + if (igc_fpe_is_tx_preempt_allowed(&adapter->fpe) && + ring->preemptible) + txqctl |= IGC_TXQCTL_PREEMPTIBLE; + /* Skip configuring CBS for Q2 and Q3 */ if (i > 1) goto skip_cbs; diff --git a/drivers/net/ethernet/intel/igc/igc_tsn.h b/drivers/net/ethernet/intel/igc/igc_tsn.h index f3d83fbbd1f4..2b67ecae99c9 100644 --- a/drivers/net/ethernet/intel/igc/igc_tsn.h +++ b/drivers/net/ethernet/intel/igc/igc_tsn.h @@ -14,6 +14,7 @@ int igc_fpe_get_smd_type(__le32 status_error); void igc_fpe_init(struct fpe_t *fpe); +bool igc_fpe_is_tx_preempt_allowed(const struct fpe_t *fpe); bool igc_fpe_is_verify_or_response(int smd_type, unsigned int size); void igc_fpe_preprocess_verify_response(struct fpe_t *fpe, int smd_type); void igc_fpe_verify_enabled_changed(struct fpe_t *fpe); -- 2.25.1