Applied, thanks. Huacai On Thu, Nov 28, 2024 at 2:11 PM Tiezhu Yang <yangtiezhu@xxxxxxxxxxx> wrote: > > The branch instructions beq, bne, blt, bge, bltu, bgeu and jirl belong > to the format reg2i16, but the sequence of oprand is different for the > instruction jirl, adjust the parameter of emit_jirl() to make it more > readable correspond with the Instruction Set Architecture manual. > > Here are the instruction formats: > > beq rj, rd, offs16 > bne rj, rd, offs16 > blt rj, rd, offs16 > bge rj, rd, offs16 > bltu rj, rd, offs16 > bgeu rj, rd, offs16 > jirl rd, rj, offs16 > > Link: https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html#branch-instructions > Suggested-by: Huacai Chen <chenhuacai@xxxxxxxxxxx> > Signed-off-by: Tiezhu Yang <yangtiezhu@xxxxxxxxxxx> > --- > > This patch is based on the following commit: > https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/commit/?id=73c359d1d356 > > arch/loongarch/include/asm/inst.h | 12 +++++++++++- > arch/loongarch/kernel/inst.c | 2 +- > arch/loongarch/net/bpf_jit.c | 6 +++--- > 3 files changed, 15 insertions(+), 5 deletions(-) > > diff --git a/arch/loongarch/include/asm/inst.h b/arch/loongarch/include/asm/inst.h > index 944482063f14..3089785ca97e 100644 > --- a/arch/loongarch/include/asm/inst.h > +++ b/arch/loongarch/include/asm/inst.h > @@ -683,7 +683,17 @@ DEF_EMIT_REG2I16_FORMAT(blt, blt_op) > DEF_EMIT_REG2I16_FORMAT(bge, bge_op) > DEF_EMIT_REG2I16_FORMAT(bltu, bltu_op) > DEF_EMIT_REG2I16_FORMAT(bgeu, bgeu_op) > -DEF_EMIT_REG2I16_FORMAT(jirl, jirl_op) > + > +static inline void emit_jirl(union loongarch_instruction *insn, > + enum loongarch_gpr rd, > + enum loongarch_gpr rj, > + int offset) > +{ > + insn->reg2i16_format.opcode = jirl_op; > + insn->reg2i16_format.immediate = offset; > + insn->reg2i16_format.rd = rd; > + insn->reg2i16_format.rj = rj; > +} > > #define DEF_EMIT_REG2BSTRD_FORMAT(NAME, OP) \ > static inline void emit_##NAME(union loongarch_instruction *insn, \ > diff --git a/arch/loongarch/kernel/inst.c b/arch/loongarch/kernel/inst.c > index 3050329556d1..14d7d700bcb9 100644 > --- a/arch/loongarch/kernel/inst.c > +++ b/arch/loongarch/kernel/inst.c > @@ -332,7 +332,7 @@ u32 larch_insn_gen_jirl(enum loongarch_gpr rd, enum loongarch_gpr rj, int imm) > return INSN_BREAK; > } > > - emit_jirl(&insn, rj, rd, imm >> 2); > + emit_jirl(&insn, rd, rj, imm >> 2); > > return insn.word; > } > diff --git a/arch/loongarch/net/bpf_jit.c b/arch/loongarch/net/bpf_jit.c > index dd350cba1252..ea357a3edc09 100644 > --- a/arch/loongarch/net/bpf_jit.c > +++ b/arch/loongarch/net/bpf_jit.c > @@ -181,13 +181,13 @@ static void __build_epilogue(struct jit_ctx *ctx, bool is_tail_call) > /* Set return value */ > emit_insn(ctx, addiw, LOONGARCH_GPR_A0, regmap[BPF_REG_0], 0); > /* Return to the caller */ > - emit_insn(ctx, jirl, LOONGARCH_GPR_RA, LOONGARCH_GPR_ZERO, 0); > + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_RA, 0); > } else { > /* > * Call the next bpf prog and skip the first instruction > * of TCC initialization. > */ > - emit_insn(ctx, jirl, LOONGARCH_GPR_T3, LOONGARCH_GPR_ZERO, 1); > + emit_insn(ctx, jirl, LOONGARCH_GPR_ZERO, LOONGARCH_GPR_T3, 1); > } > } > > @@ -904,7 +904,7 @@ static int build_insn(const struct bpf_insn *insn, struct jit_ctx *ctx, bool ext > return ret; > > move_addr(ctx, t1, func_addr); > - emit_insn(ctx, jirl, t1, LOONGARCH_GPR_RA, 0); > + emit_insn(ctx, jirl, LOONGARCH_GPR_RA, t1, 0); > move_reg(ctx, regmap[BPF_REG_0], LOONGARCH_GPR_A0); > break; > > -- > 2.42.0 >
