On Mon, 16 Dec 2019 01:13:43 PST (-0800), Bjorn Topel wrote:
RISC-V was missing a proper perf_arch_bpf_user_pt_regs macro for
CONFIG_PERF_EVENT builds.
Signed-off-by: Björn Töpel <bjorn.topel@xxxxxxxxx>
---
arch/riscv/include/asm/perf_event.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/riscv/include/asm/perf_event.h b/arch/riscv/include/asm/perf_event.h
index aefbfaa6a781..0234048b12bc 100644
--- a/arch/riscv/include/asm/perf_event.h
+++ b/arch/riscv/include/asm/perf_event.h
@@ -82,4 +82,8 @@ struct riscv_pmu {
int irq;
};
+#ifdef CONFIG_PERF_EVENTS
+#define perf_arch_bpf_user_pt_regs(regs) (struct user_regs_struct *)regs
+#endif
+
#endif /* _ASM_RISCV_PERF_EVENT_H */
Reviewed-by: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
Acked-by: Palmer Dabbelt <palmerdabbelt@xxxxxxxxxx>
