On 8/20/2024 4:10 PM, Jitendra Vegiraju wrote:
> On Thu, Aug 15, 2024 at 4:30 PM Abhishek Chauhan (ABC)
> <quic_abchauha@xxxxxxxxxxx> wrote:
>>
>>
>>
>> On 8/14/2024 3:18 PM, jitendra.vegiraju@xxxxxxxxxxxx wrote:
>>> From: Jitendra Vegiraju <jitendra.vegiraju@xxxxxxxxxxxx>
>>>
>>> Add hdma configuration support in include/linux/stmmac.h file.
>>> The hdma configuration includes mapping of virtual DMAs to physical DMAs.
>>> Define a new data structure stmmac_hdma_cfg to provide the mapping.
>>>
>>> Signed-off-by: Jitendra Vegiraju <jitendra.vegiraju@xxxxxxxxxxxx>
>>> ---
>>> include/linux/stmmac.h | 50 ++++++++++++++++++++++++++++++++++++++++++
>>> 1 file changed, 50 insertions(+)
>>>
>>> diff --git a/include/linux/stmmac.h b/include/linux/stmmac.h
>>> index 338991c08f00..1775bd2b7c14 100644
>>> --- a/include/linux/stmmac.h
>>> +++ b/include/linux/stmmac.h
>>> @@ -89,6 +89,55 @@ struct stmmac_mdio_bus_data {
>>> bool needs_reset;
>>> };
>>>
>>> +/* DW25GMAC Hyper-DMA Overview
>>> + * Hyper-DMA allows support for large number of Virtual DMA(VDMA)
>>> + * channels using a smaller set of physical DMA channels(PDMA).
>>> + * This is supported by the mapping of VDMAs to Traffic Class (TC)
>>> + * and PDMA to TC in each traffic direction as shown below.
>>> + *
>>> + * VDMAs Traffic Class PDMA
>>> + * +--------+ +------+ +-----------+
>>> + * |VDMA0 |--------->| TC0 |-------->|PDMA0/TXQ0 |
>>> + *TX +--------+ |----->+------+ +-----------+
>>> + *Host=> +--------+ | +------+ +-----------+ => MAC
>>> + *SW |VDMA1 |---+ | TC1 | +--->|PDMA1/TXQ1 |
>>> + * +--------+ +------+ | +-----------+
>>> + * +--------+ +------+----+ +-----------+
>>> + * |VDMA2 |--------->| TC2 |-------->|PDMA2/TXQ1 |
>>> + * +--------+ +------+ +-----------+
>>> + * . . .
>>> + * +--------+ +------+ +-----------+
>>> + * |VDMAn-1 |--------->| TCx-1|-------->|PDMAm/TXQm |
>>> + * +--------+ +------+ +-----------+
>>> + *
>>> + * +------+ +------+ +------+
>>> + * |PDMA0 |--------->| TC0 |-------->|VDMA0 |
>>> + * +------+ |----->+------+ +------+
>>> + *MAC => +------+ | +------+ +------+
>>> + *RXQs |PDMA1 |---+ | TC1 | +--->|VDMA1 | => Host
>>> + * +------+ +------+ | +------+
>>> + * . . .
>>> + */
>>> +
>>> +#define STMMAC_DW25GMAC_MAX_NUM_TX_VDMA 128
>>> +#define STMMAC_DW25GMAC_MAX_NUM_RX_VDMA 128
>>> +
>>> +#define STMMAC_DW25GMAC_MAX_NUM_TX_PDMA 8
>>> +#define STMMAC_DW25GMAC_MAX_NUM_RX_PDMA 10
>>> +
>> I have a query here.
>>
>> Why do we need to hardcode the number of TX PDMA and RX PDMA to 8 an 10. On some platforms the number of supported TXPDMA and RXPDMA are 11 and 11 respectively ?
>>
>> how do we overcome this problem, do we increase the value in such case?
>>
> Hi Abhishek,
> Agreed, we can make the mapping tables more generic.
> We will replace static arrays with dynamically allocated memory by
> reading the TXPDMA and RXPDMA counts from hardware.
> Thanks
That's a great idea. Thanks Jitendra. This way we do not have to hard code anything.
>>> +#define STMMAC_DW25GMAC_MAX_TC 8
>>> +
>>> +/* Hyper-DMA mapping configuration
>>> + * Traffic Class associated with each VDMA/PDMA mapping
>>> + * is stored in corresponding array entry.
>>> + */
>>> +struct stmmac_hdma_cfg {
>>> + u8 tvdma_tc[STMMAC_DW25GMAC_MAX_NUM_TX_VDMA];
>>> + u8 rvdma_tc[STMMAC_DW25GMAC_MAX_NUM_RX_VDMA];
>>> + u8 tpdma_tc[STMMAC_DW25GMAC_MAX_NUM_TX_PDMA];
>>> + u8 rpdma_tc[STMMAC_DW25GMAC_MAX_NUM_RX_PDMA];
>>> +};
>>> +
>>> struct stmmac_dma_cfg {
>>> int pbl;
>>> int txpbl;
>>> @@ -101,6 +150,7 @@ struct stmmac_dma_cfg {
>>> bool multi_msi_en;
>>> bool dche;
>>> bool atds;
>>> + struct stmmac_hdma_cfg *hdma_cfg;
>>> };
>>>
>>> #define AXI_BLEN 7
