>-----Original Message----- >From: Intel-wired-lan <intel-wired-lan-bounces@xxxxxxxxxx> On Behalf Of Kurt >Kanzenbach >Sent: Friday, July 12, 2024 2:26 PM >To: Nguyen, Anthony L <anthony.l.nguyen@xxxxxxxxx>; Kitszel, Przemyslaw ><przemyslaw.kitszel@xxxxxxxxx> >Cc: Jesper Dangaard Brouer <hawk@xxxxxxxxxx>; Daniel Borkmann ><daniel@xxxxxxxxxxxxx>; Sriram Yagnaraman ><sriram.yagnaraman@xxxxxxxxxxxx>; Richard Cochran ><richardcochran@xxxxxxxxx>; Kurt Kanzenbach <kurt@xxxxxxxxxxxxx>; John >Fastabend <john.fastabend@xxxxxxxxx>; Alexei Starovoitov <ast@xxxxxxxxxx>; >Benjamin Steinke <benjamin.steinke@xxxxxxxxxxxxxx>; Eric Dumazet ><edumazet@xxxxxxxxxx>; Sriram Yagnaraman ><sriram.yagnaraman@xxxxxxxx>; intel-wired-lan@xxxxxxxxxxxxxxxx; >netdev@xxxxxxxxxxxxxxx; Jakub Kicinski <kuba@xxxxxxxxxx>; >bpf@xxxxxxxxxxxxxxx; Paolo Abeni <pabeni@xxxxxxxxxx>; David S. Miller ><davem@xxxxxxxxxxxxx>; Sebastian Andrzej Siewior <bigeasy@xxxxxxxxxxxxx> >Subject: [Intel-wired-lan] [PATCH iwl-next v5 2/4] igb: Introduce XSK data >structures and helpers > >From: Sriram Yagnaraman <sriram.yagnaraman@xxxxxxxx> > >Add the following ring flags >- IGB_RING_FLAG_TX_DISABLED (when xsk pool is being setup) >- IGB_RING_FLAG_AF_XDP_ZC (xsk pool is active) > >Add a xdp_buff array for use with XSK receive batch API, and a pointer to >xsk_pool in igb_adapter. > >Add enable/disable functions for TX and RX rings Add enable/disable functions >for XSK pool Add xsk wakeup function > >None of the above functionality will be active until >NETDEV_XDP_ACT_XSK_ZEROCOPY is advertised in netdev->xdp_features. > >Signed-off-by: Sriram Yagnaraman <sriram.yagnaraman@xxxxxxxx> >Signed-off-by: Kurt Kanzenbach <kurt@xxxxxxxxxxxxx> >--- > drivers/net/ethernet/intel/igb/Makefile | 2 +- > drivers/net/ethernet/intel/igb/igb.h | 14 +- > drivers/net/ethernet/intel/igb/igb_main.c | 9 ++ > drivers/net/ethernet/intel/igb/igb_xsk.c | 210 >++++++++++++++++++++++++++++++ > 4 files changed, 233 insertions(+), 2 deletions(-) > Tested-by: Chandan Kumar Rout <chandanx.rout@xxxxxxxxx> (A Contingent Worker at Intel)