On Tue, May 07, 2024 at 06:45:28PM +0800, Xiao Wang wrote: > The Zba extension provides add.uw insn which can be used to implement > zext.w with rs2 set as ZERO. > > Signed-off-by: Xiao Wang <xiao.w.wang@xxxxxxxxx> > --- > arch/riscv/Kconfig | 19 +++++++++++++++++++ > arch/riscv/net/bpf_jit.h | 18 ++++++++++++++++++ > 2 files changed, 37 insertions(+) > > diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig > index 6bec1bce6586..0679127cc0ea 100644 > --- a/arch/riscv/Kconfig > +++ b/arch/riscv/Kconfig > @@ -586,6 +586,14 @@ config RISCV_ISA_V_PREEMPTIVE > preemption. Enabling this config will result in higher memory > consumption due to the allocation of per-task's kernel Vector context. > > +config TOOLCHAIN_HAS_ZBA > + bool > + default y > + depends on !64BIT || $(cc-option,-mabi=lp64 -march=rv64ima_zba) > + depends on !32BIT || $(cc-option,-mabi=ilp32 -march=rv32ima_zba) > + depends on LLD_VERSION >= 150000 || LD_VERSION >= 23900 > + depends on AS_HAS_OPTION_ARCH > + > config TOOLCHAIN_HAS_ZBB > bool > default y > @@ -601,6 +609,17 @@ config TOOLCHAIN_HAS_VECTOR_CRYPTO > def_bool $(as-instr, .option arch$(comma) +v$(comma) +zvkb) > depends on AS_HAS_OPTION_ARCH > > +config RISCV_ISA_ZBA > + bool "Zba extension support for bit manipulation instructions" > + depends on TOOLCHAIN_HAS_ZBA > + depends on RISCV_ALTERNATIVE > + default y > + help > + Adds support to dynamically detect the presence of the ZBA > + extension (address generation acceleration) and enable its usage. Recently I sent some patches to reword other extensions' help text, because the "add support to dynamically detect" had confused people a bit. Dynamic detection is done regardless of config options for Zba. The wording I went with in my patch for Zbb was: Add support for enabling optimisations in the kernel when the Zbb extension is detected at boot. Could you use something similar here in the opening sentence please? Thanks, Conor.
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