On Mon, Apr 29, 2024 at 05:23:23PM -0400, Frank Li wrote: > On Mon, Apr 29, 2024 at 10:48:23AM -0500, Rob Herring wrote: > > On Tue, Apr 02, 2024 at 10:33:46AM -0400, Frank Li wrote: > > > From: Richard Zhu <hongxing.zhu@xxxxxxx> > > > > > > Add i.MX8Q PCIe "fsl,imx8q-pcie" compatible strings. > > > > > > Add "fsl,local-address" property for i.MX8Q platforms. fsl,local-address > > > is address of PCIe module in high speed io (HSIO)subsystem bus fabric. HSIO > > > bus fabric convert the incoming address base to this local-address. Two > > > instances of PCI have difference local address. > > > > This is just some intermediate bus address? We really should be able to > > describe this with standard ranges properties. > > Yes, Maybe dwc's implement have some problem. After read below doc again > https://elinux.org/Device_Tree_Usage#PCI_Address_Translation > > ┌──────┐ ┌──────────┐ > ┌────┐0x18001000 │ │ │ │ > │CPU ├───────────►│ ├──┤ Others │ > └────┘ │ │ │ │ > │ │ └──────────┘ > │ │ > │ │ ┌─────────┐ > │ │ │ │ ┌───────────┐ > │ ├──►│ HSIO │ 0xB8001000 ├───────────┤ > │ │ │ Fabric ├───────────►│Bar0 │ TLP mem 0xB8001000 > │ │ │ │ │0xB8000000 ├───────► > └──────┘ └─────────┘ │ │ Note the 0xB8xxxxxxx address on the right is a PCI address which could be anything though folks often make it 1:1. > Main Fabric ├───────────┤ > │ │ > │ │ > │ │ > │ │ > │ │ > │ │ > │ DWC │ > │ PCIe │ > │ Controller│ > │ │ > │ │ > └───────────┘ > > > dts should be > > ranges = <0x82000000 0 0xB8000000 0x18000000 0 0x07f00000> > ^^^^ And HSIO needs a node with ranges = <0xb8000000 0x18000000 size>; Rob
