Re: [PATCH net-next v4 07/11] arch: x86: Add IPC mailbox accessor function and add SoC register access

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On 31/1/2024 6:54 pm, Ilpo Järvinen wrote:
On Mon, 29 Jan 2024, Choong Yong Liang wrote:

From: "David E. Box" <david.e.box@xxxxxxxxxxxxxxx>

- Exports intel_pmc_ipc() for host access to the PMC IPC mailbox
- Add support to use IPC command allows host to access SoC registers
through PMC firmware that are otherwise inaccessible to the host due to
security policies.

Signed-off-by: David E. Box <david.e.box@xxxxxxxxxxxxxxx>
Signed-off-by: Chao Qin <chao.qin@xxxxxxxxx>
Signed-off-by: Choong Yong Liang <yong.liang.choong@xxxxxxxxxxxxxxx>
---
  MAINTAINERS                                   |  2 +
  arch/x86/Kconfig                              |  9 +++
  arch/x86/platform/intel/Makefile              |  1 +
  arch/x86/platform/intel/pmc_ipc.c             | 75 +++++++++++++++++++
  .../linux/platform_data/x86/intel_pmc_ipc.h   | 34 +++++++++
  5 files changed, 121 insertions(+)
  create mode 100644 arch/x86/platform/intel/pmc_ipc.c
  create mode 100644 include/linux/platform_data/x86/intel_pmc_ipc.h

diff --git a/MAINTAINERS b/MAINTAINERS
index 8709c7cd3656..441eb921edef 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10973,8 +10973,10 @@ M:	Rajneesh Bhardwaj <irenic.rajneesh@xxxxxxxxx>
  M:	David E Box <david.e.box@xxxxxxxxx>
  L:	platform-driver-x86@xxxxxxxxxxxxxxx
  S:	Maintained
+F:	arch/x86/platform/intel/pmc_ipc.c
  F:	Documentation/ABI/testing/sysfs-platform-intel-pmc
  F:	drivers/platform/x86/intel/pmc/
+F:	linux/platform_data/x86/intel_pmc_ipc.h
INTEL PMIC GPIO DRIVERS
  M:	Andy Shevchenko <andy@xxxxxxxxxx>
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 5edec175b9bf..bceae28b9381 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -666,6 +666,15 @@ config X86_AMD_PLATFORM_DEVICE
  	  I2C and UART depend on COMMON_CLK to set clock. GPIO driver is
  	  implemented under PINCTRL subsystem.
+config INTEL_PMC_IPC
+	tristate "Intel Core SoC Power Management Controller IPC mailbox"
+	depends on ACPI
+	help
+	  This option enables sideband register access support for Intel SoC
+	  power management controller IPC mailbox.
+
+	  If you don't require the option or are in doubt, say N.
+
  config IOSF_MBI
  	tristate "Intel SoC IOSF Sideband support for SoC platforms"
  	depends on PCI
diff --git a/arch/x86/platform/intel/Makefile b/arch/x86/platform/intel/Makefile
index dbee3b00f9d0..470fc68de6ba 100644
--- a/arch/x86/platform/intel/Makefile
+++ b/arch/x86/platform/intel/Makefile
@@ -1,2 +1,3 @@
  # SPDX-License-Identifier: GPL-2.0-only
  obj-$(CONFIG_IOSF_MBI)			+= iosf_mbi.o
+obj-$(CONFIG_INTEL_PMC_IPC)		+= pmc_ipc.o
\ No newline at end of file

New line missing.


Thank you for letting me know.
I will fix it in the new patch series.




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