Add Zbb support [0] to optimize code size and performance of RV64 JIT. Meanwhile, adjust the code for unification and simplification. Tests test_bpf.ko and test_verifier have passed, as well as the relative testcases of test_progs*. Link: https://github.com/riscv/riscv-bitmanip/releases/download/1.0.0/bitmanip-1.0.0-38-g865e7a7.pdf [0] v3: - Change to early-exit code style and make code more explicit. v2: https://lore.kernel.org/bpf/20230919035839.3297328-1-pulehui@xxxxxxxxxxxxxxx - Add runtime detection for Zbb instructions. - Correct formatting issues detected by checkpatch. v1: https://lore.kernel.org/bpf/20230913153413.1446068-1-pulehui@xxxxxxxxxxxxxxx Pu Lehui (6): riscv, bpf: Unify 32-bit sign-extension to emit_sextw riscv, bpf: Unify 32-bit zero-extension to emit_zextw riscv, bpf: Simplify sext and zext logics in branch instructions riscv, bpf: Add necessary Zbb instructions riscv, bpf: Optimize sign-extention mov insns with Zbb support riscv, bpf: Optimize bswap insns with Zbb support arch/riscv/net/bpf_jit.h | 134 ++++++++++++++++++++ arch/riscv/net/bpf_jit_comp64.c | 210 +++++++++++--------------------- 2 files changed, 205 insertions(+), 139 deletions(-) -- 2.34.1
