On Fri, May 24, 2019 at 01:52:19PM +0100, Jean-Philippe Brucker wrote: > GCC 8.1.0 reports that the ldadd instruction encoding, recently added to > insn.c, doesn't match the mask and couldn't possibly be identified: > > linux/arch/arm64/include/asm/insn.h: In function 'aarch64_insn_is_ldadd': > linux/arch/arm64/include/asm/insn.h:280:257: warning: bitwise comparison always evaluates to false [-Wtautological-compare] > > Bits [31:30] normally encode the size of the instruction (1 to 8 bytes) > and the current instruction value only encodes the 4- and 8-byte > variants. At the moment only the BPF JIT needs this instruction, and > doesn't require the 1- and 2-byte variants, but to be consistent with > our other ldr and str instruction encodings, clear the size field in the > insn value. > > Fixes: 34b8ab091f9ef57a ("bpf, arm64: use more scalable stadd over ldxr / stxr loop in xadd") > Reported-by: Kuninori Morimoto <kuninori.morimoto.gx@xxxxxxxxxxx> > Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@xxxxxxxxxxx> > Signed-off-by: Jean-Philippe Brucker <jean-philippe.brucker@xxxxxxx> Cheers, I've picked up this patch with Daniel's Ack, and also the other patch as-is. Will