Hi Jiong, Jiong Wang wrote:
After previous patches, verifier has marked those instructions that really need zero extension on dst_reg.
Thanks for implementing this -- this is very helpful on architectures without sub-register instructions, especially in comparison with legacy BPF, since the move to eBPF resulted in lot more instructions being generated.
I have a small nit below on the overall approach...
It is then for all back-ends to decide how to use such information to eliminate unnecessary zero extension code-gen during JIT compilation. One approach is: 1. Verifier insert explicit zero extension for those instructions that need zero extension. 2. All JIT back-ends do NOT generate zero extension for sub-register write any more.
Is it possible to instead give a hint to the JIT back-ends on the instructions needing zero-extension? That would help in case of architectures that have single/more-optimal instruction for zero extension, compared to having to emit 2 instructions with the current approach.
- Naveen