Re: [arch-dev-public] Changes to microcode updates

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To remove any doubts, just take a look at /proc/cpuinfo. With 4 cores
and 8 threads, I have 8 entries in there. The "processor" is ranging
from 0 to 7 (aka threads) while "core id" (aka cores) from 0 to 3. If
you grep it, it will (kinda) give you the thread-core mapping.

% grep "processor\|core id" /proc/cpuinfo
processor	: 0
core id		: 0
processor	: 1
core id		: 1
processor	: 2
core id		: 2
processor	: 3
core id		: 3
processor	: 4
core id		: 0
processor	: 5
core id		: 1
processor	: 6
core id		: 2
processor	: 7
core id		: 3

which perfectly matches with the microcode update output, if you keep in
mind that every core is only updated once (probably they just iterate
through them and update on first hit, which leads to some getting only
every 2nd updated).

% dmesg  | grep microcode
[    0.000000] CPU0 microcode updated early to revision 0x1b, date =
2014-05-29
[    0.087677] CPU1 microcode updated early to revision 0x1b, date =
2014-05-29
[    0.107693] CPU2 microcode updated early to revision 0x1b, date =
2014-05-29
[    0.127811] CPU3 microcode updated early to revision 0x1b, date =
2014-05-29
[    0.405981] microcode: CPU0 sig=0x306a9, pf=0x2, revision=0x1b
[    0.405986] microcode: CPU1 sig=0x306a9, pf=0x2, revision=0x1b
[    0.405991] microcode: CPU2 sig=0x306a9, pf=0x2, revision=0x1b
[    0.405997] microcode: CPU3 sig=0x306a9, pf=0x2, revision=0x1b
[    0.406002] microcode: CPU4 sig=0x306a9, pf=0x2, revision=0x1b
[    0.406007] microcode: CPU5 sig=0x306a9, pf=0x2, revision=0x1b
[    0.406012] microcode: CPU6 sig=0x306a9, pf=0x2, revision=0x1b
[    0.406016] microcode: CPU7 sig=0x306a9, pf=0x2, revision=0x1b
[    0.406052] microcode: Microcode Update Driver: v2.00
<tigran@xxxxxxxxxxxxxxxxxxxx>, Peter Oruba

Which CPU ids are updated shouldn't matter in any way, as long as the
number of updates matches the number of real CPU cores and the system
recognizes all threads.


On 24.10.2014 00:57, Jody Allen wrote:
> On Thu, Oct 23, 2014 at 6:53 PM, Neitsab <neitsab@xxxxxx> wrote:
>>
>> My guess is it's because of hyperthreading: my CPU has 2 physical
>> cores but kernel detects 4 CPUs; however only "real"/physical cores
>> get the microcode update, so two (0 and 2) out of the four detected.
> 
> Thanks for the info.  I had a feeling it would be something like this.
> 


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