[Public]
Thanks for clarification. This patch is
Reviewed-by: Yifan Zhang <yifan1.zhang@xxxxxxx>
-----Original Message-----
From: Huang, Tim <Tim.Huang@xxxxxxx>
Sent: Tuesday, October 10, 2023 2:38 PM
To: Zhang, Yifan <Yifan1.Zhang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Subject: RE: [PATCH] drm/amd/pm: wait for completion of the EnableGfxImu command
[AMD Official Use Only - General]
Hi Yifan,
-----Original Message-----
From: Zhang, Yifan <Yifan1.Zhang@xxxxxxx>
Sent: Tuesday, October 10, 2023 1:31 PM
To: Huang, Tim <Tim.Huang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>
Subject: RE: [PATCH] drm/amd/pm: wait for completion of the EnableGfxImu command
[AMD Official Use Only - General]
> I'm wondering why it is "without waiting" in the first place ? It doesn't make sense to continue driver loading if power up GFX fails. Can we apply the change regardless of load types ?
The "without waiting" is only for ASIC bringing up. Because of some reason, the SMU can't response to driver in the GFX powerup stage if use FW backdoor loading, It may hang the system if driver try to read the status of the SMU. So, drive will wait a regular time to let SMU powerup the GFX but not by polling the response of the command.
Keep this "without waiting" for FW backdoor loading, maybe new ASICs bringing up need it as well. It will never be used for the normal case (AMDGPU_FW_LOAD_PSP).
Best Regards,
Tim Huang
-----Original Message-----
From: Huang, Tim <Tim.Huang@xxxxxxx>
Sent: Tuesday, October 10, 2023 12:47 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Zhang, Yifan <Yifan1.Zhang@xxxxxxx>; Huang, Tim <Tim.Huang@xxxxxxx>
Subject: [PATCH] drm/amd/pm: wait for completion of the EnableGfxImu command
Wait for completion of sending the EnableGfxImu message when using the PSP FW loading.
Signed-off-by: Tim Huang <Tim.Huang@xxxxxxx>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 12 ++++++++++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index 8dc683c02a7d..bcb7ab9d2221 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -82,6 +82,8 @@ MODULE_FIRMWARE("amdgpu/smu_13_0_10.bin");
#define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE_MASK 0xC000 #define PCIE_LC_SPEED_CNTL__LC_CURRENT_DATA_RATE__SHIFT 0xE
+#define ENABLE_IMU_ARG_GFXOFF_ENABLE 1
+
static const int link_width[] = {0, 1, 2, 4, 8, 12, 16};
const int pmfw_decoded_link_speed[5] = {1, 2, 3, 4, 5}; @@ -2301,11 +2303,17 @@ int smu_v13_0_baco_exit(struct smu_context *smu) int smu_v13_0_set_gfx_power_up_by_imu(struct smu_context *smu) {
uint16_t index;
+ struct amdgpu_device *adev = smu->adev;
+
+ if (adev->firmware.load_type == AMDGPU_FW_LOAD_PSP) {
+ return smu_cmn_send_smc_msg_with_param(smu, SMU_MSG_EnableGfxImu,
+ ENABLE_IMU_ARG_GFXOFF_ENABLE, NULL);
+ }
index = smu_cmn_to_asic_specific_index(smu, CMN2ASIC_MAPPING_MSG,
SMU_MSG_EnableGfxImu);
- /* Param 1 to tell PMFW to enable GFXOFF feature */
- return smu_cmn_send_msg_without_waiting(smu, index, 1);
+ return smu_cmn_send_msg_without_waiting(smu, index,
+
+ ENABLE_IMU_ARG_GFXOFF_ENABLE);
}
int smu_v13_0_od_edit_dpm_table(struct smu_context *smu,
--
2.39.2
