From: Max Tseng <max.tseng@xxxxxxx> Fine tune the Vmin clock value Reviewed-by: Robin Chen <robin.chen@xxxxxxx> Acked-by: Tom Chung <chiahsuan.chung@xxxxxxx> Signed-off-by: Max Tseng <max.tseng@xxxxxxx> --- drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c | 2 +- drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c | 8 +++++++- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c index d8fa229d78ce..64a2692fd4f6 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn314/dcn314_resource.c @@ -1914,7 +1914,7 @@ static bool dcn314_resource_construct( dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; - dc->caps.max_disp_clock_khz_at_vmin = 694000; + dc->caps.max_disp_clock_khz_at_vmin = 650000; /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; diff --git a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c index 693c7ba4b34d..24b455f3ac3c 100644 --- a/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c +++ b/drivers/gpu/drm/amd/display/dc/dcn35/dcn35_resource.c @@ -1831,7 +1831,13 @@ static bool dcn35_resource_construct( dc->caps.color.mpc.ogam_rom_caps.hlg = 0; dc->caps.color.mpc.ocsc = 1; - dc->caps.max_disp_clock_khz_at_vmin = 669154; + /* max_disp_clock_khz_at_vmin is slightly lower than the STA value in order + * to provide some margin. + * It's expected for furture ASIC to have equal or higher value, in order to + * have determinstic power improvement from generate to genration. + * (i.e., we should not expect new ASIC generation with lower vmin rate) + */ + dc->caps.max_disp_clock_khz_at_vmin = 650000; /* Use pipe context based otg sync logic */ dc->config.use_pipe_ctx_sync_logic = true; -- 2.25.1
