>From gfx10 and onwards, there are two bitmaps in driver,
CU bitmap and WGP bitmap, current log for harvesting WGP is
misleading, the disabling unit is WGP not CU for gfx10 and later.
Signed-off-by: Yifan Zhang <yifan1.zhang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | 10 +++++-----
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 17 ++++++++++-------
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 2 +-
drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 2 +-
11 files changed, 24 insertions(+), 21 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index 83a9607a87b8..81191005854d 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -184,7 +184,7 @@ extern uint amdgpu_pcie_lane_cap;
extern u64 amdgpu_cg_mask;
extern uint amdgpu_pg_mask;
extern uint amdgpu_sdma_phase_quantum;
-extern char *amdgpu_disable_cu;
+extern char *amdgpu_disable_wgp_cu;
extern char *amdgpu_virtual_display;
extern uint amdgpu_pp_feature_mask;
extern uint amdgpu_force_long_training;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index ef713806dd60..1eff18649963 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -151,7 +151,7 @@ uint amdgpu_pcie_lane_cap;
u64 amdgpu_cg_mask = 0xffffffffffffffff;
uint amdgpu_pg_mask = 0xffffffff;
uint amdgpu_sdma_phase_quantum = 32;
-char *amdgpu_disable_cu;
+char *amdgpu_disable_wgp_cu;
char *amdgpu_virtual_display;
bool enforce_isolation;
/*
@@ -505,11 +505,11 @@ MODULE_PARM_DESC(sdma_phase_quantum, "SDMA context switch phase quantum (x 1K GP
module_param_named(sdma_phase_quantum, amdgpu_sdma_phase_quantum, uint, 0444);
/**
- * DOC: disable_cu (charp)
- * Set to disable CUs (It's set like se.sh.cu,...). The default is NULL.
+ * DOC: disable_wgp_cu (charp)
+ * Set to disable WGP (gfx10 and later) or CUs (gfx9 and ealier) (It's set like se.sh.cu,...). The default is NULL.
*/
-MODULE_PARM_DESC(disable_cu, "Disable CUs (se.sh.cu,...)");
-module_param_named(disable_cu, amdgpu_disable_cu, charp, 0444);
+MODULE_PARM_DESC(disable_wgp_cu, "Disable WGP or CUs (se.sh.cu,...)");
+module_param_named(disable_wgp_cu, amdgpu_disable_wgp_cu, charp, 0444);
/**
* DOC: virtual_display (charp)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 2382921710ec..13a24efe2352 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -107,20 +107,23 @@ bool amdgpu_gfx_is_me_queue_enabled(struct amdgpu_device *adev,
* @max_se: number of SEs
* @max_sh: number of SHs
*
- * The bitmask of CUs to be disabled in the shader array determined by se and
+ * The bitmask of WGP or CUs to be disabled in the shader array determined by se and
* sh is stored in mask[se * max_sh + sh].
*/
-void amdgpu_gfx_parse_disable_cu(unsigned int *mask, unsigned int max_se, unsigned int max_sh)
+void amdgpu_gfx_parse_disable_cu(unsigned int *mask, unsigned int max_se, unsigned int max_sh, bool wgp_mode)
{
unsigned int se, sh, cu;
const char *p;
+ const char *disable_unit;
+
+ disable_unit = wgp_mode ? "WGP" : "CU";
memset(mask, 0, sizeof(*mask) * max_se * max_sh);
- if (!amdgpu_disable_cu || !*amdgpu_disable_cu)
+ if (!amdgpu_disable_wgp_cu || !*amdgpu_disable_wgp_cu)
return;
- p = amdgpu_disable_cu;
+ p = amdgpu_disable_wgp_cu;
for (;;) {
char *next;
int ret = sscanf(p, "%u.%u.%u", &se, &sh, &cu);
@@ -131,11 +134,11 @@ void amdgpu_gfx_parse_disable_cu(unsigned int *mask, unsigned int max_se, unsign
}
if (se < max_se && sh < max_sh && cu < 16) {
- DRM_INFO("amdgpu: disabling CU %u.%u.%u\n", se, sh, cu);
+ DRM_INFO("amdgpu: disabling %s %u.%u.%u\n", disable_unit, se, sh, cu);
mask[se * max_sh + sh] |= 1u << cu;
} else {
- DRM_ERROR("amdgpu: disable_cu %u.%u.%u is out of range\n",
- se, sh, cu);
+ DRM_ERROR("amdgpu: disable_%s %u.%u.%u is out of range\n",
+ disable_unit, se, sh, cu);
}
next = strchr(p, ',');
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
index 395c1768b9fc..c13af19c9b82 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
@@ -473,7 +473,7 @@ static inline u32 amdgpu_gfx_create_bitmask(u32 bit_width)
}
void amdgpu_gfx_parse_disable_cu(unsigned *mask, unsigned max_se,
- unsigned max_sh);
+ unsigned max_sh, bool wgp_mode);
int amdgpu_gfx_kiq_init_ring(struct amdgpu_device *adev,
struct amdgpu_ring *ring,
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 6ccde07ed63e..bdb980e20b1a 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -9422,7 +9422,7 @@ static int gfx_v10_0_get_cu_info(struct amdgpu_device *adev,
if (!adev || !cu_info)
return -EINVAL;
- amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
+ amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2, true);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
index 337ed771605f..03b765658d94 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v11_0.c
@@ -6364,7 +6364,7 @@ static int gfx_v11_0_get_cu_info(struct amdgpu_device *adev,
if (!adev || !cu_info)
return -EINVAL;
- amdgpu_gfx_parse_disable_cu(disable_masks, 8, 2);
+ amdgpu_gfx_parse_disable_cu(disable_masks, 8, 2, true);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index da6caff78c22..33182b058458 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -3564,7 +3564,7 @@ static void gfx_v6_0_get_cu_info(struct amdgpu_device *adev)
memset(cu_info, 0, sizeof(*cu_info));
- amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
+ amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2, false);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
index 90b034b173c1..f916266d86b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
@@ -5106,7 +5106,7 @@ static void gfx_v7_0_get_cu_info(struct amdgpu_device *adev)
memset(cu_info, 0, sizeof(*cu_info));
- amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
+ amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2, false);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 51c1745c8369..cb28926eca55 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -7108,7 +7108,7 @@ static void gfx_v8_0_get_cu_info(struct amdgpu_device *adev)
else
ao_cu_num = adev->gfx.config.max_cu_per_sh;
- amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2);
+ amdgpu_gfx_parse_disable_cu(disable_masks, 4, 2, false);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 5c85ac34360f..aa2b6517d38d 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -7208,7 +7208,7 @@ static int gfx_v9_0_get_cu_info(struct amdgpu_device *adev,
amdgpu_gfx_parse_disable_cu(disable_masks,
adev->gfx.config.max_shader_engines,
- adev->gfx.config.max_sh_per_se);
+ adev->gfx.config.max_sh_per_se, false);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
index a60d1a8405d4..6a9005eee43b 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c
@@ -4306,7 +4306,7 @@ static int gfx_v9_4_3_get_cu_info(struct amdgpu_device *adev,
amdgpu_gfx_parse_disable_cu(disable_masks,
adev->gfx.config.max_shader_engines,
- adev->gfx.config.max_sh_per_se);
+ adev->gfx.config.max_sh_per_se, false);
mutex_lock(&adev->grbm_idx_mutex);
for (i = 0; i < adev->gfx.config.max_shader_engines; i++) {
--
2.37.3
