On Mon, Sep 4, 2023 at 9:20 AM Lijo Lazar <lijo.lazar@xxxxxxx> wrote: > > pp_dpm_*clk nodes also could show the frequencies when a clock is in > 'sleep' state. Add documentation related to that. > > Signed-off-by: Lijo Lazar <lijo.lazar@xxxxxxx> > --- > drivers/gpu/drm/amd/pm/amdgpu_pm.c | 10 +++++++++- > 1 file changed, 9 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/pm/amdgpu_pm.c b/drivers/gpu/drm/amd/pm/amdgpu_pm.c > index 84e1af6a6ce7..3dca1aa473c8 100644 > --- a/drivers/gpu/drm/amd/pm/amdgpu_pm.c > +++ b/drivers/gpu/drm/amd/pm/amdgpu_pm.c > @@ -983,7 +983,15 @@ static ssize_t amdgpu_get_pp_features(struct device *dev, > * pp_dpm_fclk interface is only available for Vega20 and later ASICs. > * > * Reading back the files will show you the available power levels within > - * the power state and the clock information for those levels. > + * the power state and the clock information for those levels. If deep sleep is > + * applied to a clock, the level will be denoted by a special level 'S:' > + * E.g., > + * S: 19Mhz * > + * 0: 615Mhz > + * 1: 800Mhz > + * 2: 888Mhz > + * 3: 1000Mhz > + * > * > * To manually adjust these states, first select manual using > * power_dpm_force_performance_level. Might be nice to update older asics to follow this model as well at some point. Alex > -- > 2.25.1 >
