Re: [PATCH] drm/amdgpu: calling address translation functions to simplify codes

[Christian König <ckoenig.leichtzumerken@xxxxxxxxx>]

Am 04.09.23 um 10:18 schrieb Yifan Zhang:
> Use amdgpu_gmc_vram_pa to simplify codes.
>
> Signed-off-by: Yifan Zhang <yifan1.zhang@xxxxxxx>

Reviewed-by: Christian König <christian.koenig@xxxxxxx>

> ---
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c | 3 +--
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c    | 3 +--
>   drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c  | 3 +--
>   drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c      | 3 +--
>   drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c     | 3 +--
>   drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c   | 3 +--
>   drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c   | 3 +--
>   drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c     | 3 +--
>   8 files changed, 8 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
> index 2eb3386ae7ac..bcb6ba03cead 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v11_5_0.c
> @@ -168,8 +168,7 @@ static void gfxhub_v11_5_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start
> -		+ adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> index e1c76c070ba9..89ff7910cb0f 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> @@ -164,8 +164,7 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start
> -		+ adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
> index 07f369c7a1ed..be1da5927910 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0_3.c
> @@ -169,8 +169,7 @@ static void gfxhub_v3_0_3_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start
> -		+ adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index dcbba981462e..671e288c7575 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -500,8 +500,7 @@ static void gmc_v11_0_get_vm_pde(struct amdgpu_device *adev, int level,
>   				 uint64_t *addr, uint64_t *flags)
>   {
>   	if (!(*flags & AMDGPU_PDE_PTE) && !(*flags & AMDGPU_PTE_SYSTEM))
> -		*addr = adev->vm_manager.vram_base_offset + *addr -
> -			adev->gmc.vram_start;
> +		*addr = amdgpu_gmc_vram_mc2pa(adev, *addr);
>   	BUG_ON(*addr & 0xFFFF00000000003FULL);
>   
>   	if (!adev->gmc.translate_further)
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> index 441379e91cfa..7c9ab5491067 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> @@ -189,8 +189,7 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start +
> -		adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> index 12c7f4b46ea9..db79e6f92441 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_1.c
> @@ -188,8 +188,7 @@ static void mmhub_v3_0_1_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start +
> -		adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> index 5dadc85abf7e..d1fc9dce7151 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> @@ -181,8 +181,7 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
>   	}
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start +
> -		adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
> index ec1fb329524d..8194ee2b96c4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_3.c
> @@ -180,8 +180,7 @@ static void mmhub_v3_3_init_system_aperture_regs(struct amdgpu_device *adev)
>   		     max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18);
>   
>   	/* Set default page address. */
> -	value = adev->mem_scratch.gpu_addr - adev->gmc.vram_start +
> -		adev->vm_manager.vram_base_offset;
> +	value = amdgpu_gmc_vram_mc2pa(adev, adev->mem_scratch.gpu_addr);
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB,
>   		     (u32)(value >> 12));
>   	WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB,