[AMD Official Use Only - General]
Hi all,
This week this patchset was tested on the following systems:
* Lenovo ThinkBook T13s Gen4 with AMD Ryzen 5 6600U
* MSI Gaming X Trio RX 6800
* Gigabyte Gaming OC RX 7900 XTX
These systems were tested on the following display/connection types:
* eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U])
* VGA and DVI (1680x1050 60hz [DP to VGA/DVI, USB-C to VGA/DVI])
* DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz, 4k 240hz [Includes USB-C to DP/HDMI adapters])
* Thunderbolt (LG Ultrafine 5k)
* MST (Startech MST14DP123DP [DP to 3x DP] and 2x 4k 60Hz displays)
* DSC (with Cable Matters 101075 [DP to 3x DP] with 3x 4k60 displays, and HP Hook G2 with 1 4k60 display)
* USB 4 (Kensington SD5700T and 1x 4k 60Hz display)
* PCON (Club3D CAC-1085 and 1x 4k 144Hz display [at 4k 120HZ, as that is the max the adapter supports])
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
* Changing display configurations and settings
* Benchmark testing
* Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
* Script testing (scripts to automate some of the manual checks)
* IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 389af3e7a5f7 drm/amd/display: Promote DC to 2.3.245) with new patches added on top of it.
Tested on Ubuntu 22.04.2
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Tom Chung <chiahsuan.chung@xxxxxxx>
Sent: Wednesday, August 2, 2023 2:51 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Chung, ChiaHsuan (Tom) <ChiaHsuan.Chung@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/22] DC Patches Aug 04 2023
This DC patchset brings improvements in multiple areas. In summary, we have:
- Fix a regression in blank pixel data caused by coding mistake
- Fix a bug when searching for insert_above_mpcc
- Fix backlight off cmd for OLED panel
- Update add plane to context logic with a new algorithm
- Adjust visual confirm dpp height offset to be 1/240 of v addressable
- Add interface to enable DPIA trace
- Support plane clip with zero recout size
- Blocking invalid 420 modes on HDMI TMDS for DCN31 and DCN314
- Make mpc32 functions available to future DCNs
- Change HDCP update sequence for DM
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Alvin Lee (1):
drm/amd/display: Use max memclk variable when setting max memclk
Austin Zheng (2):
drm/amd/display: Set Stream Update Flags in commit_state_no_check
drm/amd/display: Use DTBCLK as refclk instead of DPREFCLK
Bhawanpreet Lakha (1):
drm/amd/display: Change HDCP update sequence for DM
Leo Chen (3):
drm/amd/display: Revert "dc: read down-spread percentage from lut to
adjust dprefclk"
drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN31
drm/amd/display: Blocking invalid 420 modes on HDMI TMDS for DCN314
Martin Leung (1):
drm/amd/display: Promote DAL to 3.2.246
Mike Hsieh (1):
drm/amd/display: Add vendor Id for reference
Stylon Wang (2):
drm/amd/display: Add interface to enable DPIA trace
drm/amd/display: Enable DPIA trace with DC debug mask
Swapnil Patel (1):
drm/amd/display: Fix backlight off cmd for OLED panel
Wenjing Liu (8):
drm/amd/display: fix a regression in blank pixel data caused by coding
mistake
drm/amd/display: support plane clip with zero recout size
drm/amd/display: always acquire MPO pipe for every blending tree
drm/amd/display: update add plane to context logic with a new
algorithm
drm/amd/display: adjust visual confirm dpp height offset to be 1/240
of v addressable
drm/amd/display: do not treat clip_rect size change as a scaling
change
drm/amd/display: move idle pipe allocation logic into dcn specific
layer
drm/amd/display: rename acquire_idle_pipe_for_layer to
acquire_free_pipe_as_sec_dpp_pipe
Wesley Chalmers (2):
drm/amd/display: Fix a bug when searching for insert_above_mpcc
drm/amd/display: Make mpc32 functions available to future DCNs
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 7 +-
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 80 ++-
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 32 +-
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.h | 7 -
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 2 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 111 +---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 589 ++++++++----------
drivers/gpu/drm/amd/display/dc/dc.h | 2 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 29 +
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 3 +
.../display/dc/dce110/dce110_hw_sequencer.c | 3 +-
.../amd/display/dc/dce110/dce110_resource.c | 12 +-
.../gpu/drm/amd/display/dc/dcn10/dcn10_mpc.c | 5 +-
.../drm/amd/display/dc/dcn10/dcn10_resource.c | 15 +-
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 2 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 15 +-
.../drm/amd/display/dc/dcn20/dcn20_resource.h | 7 +-
.../amd/display/dc/dcn201/dcn201_resource.c | 15 +-
.../drm/amd/display/dc/dcn21/dcn21_resource.c | 2 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 2 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 2 +-
.../amd/display/dc/dcn302/dcn302_resource.c | 2 +-
.../amd/display/dc/dcn303/dcn303_resource.c | 2 +-
.../drm/amd/display/dc/dcn31/dcn31_resource.c | 2 +-
.../amd/display/dc/dcn314/dcn314_resource.c | 2 +-
.../amd/display/dc/dcn315/dcn315_resource.c | 2 +-
.../amd/display/dc/dcn316/dcn316_resource.c | 2 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 3 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 28 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h | 61 ++ .../drm/amd/display/dc/dcn32/dcn32_resource.c | 188 +++---
.../drm/amd/display/dc/dcn32/dcn32_resource.h | 8 +-
.../amd/display/dc/dcn321/dcn321_resource.c | 2 +-
.../drm/amd/display/dc/dml/calcs/dcn_calcs.c | 2 +-
.../dc/dml/dcn31/display_mode_vba_31.c | 4 +-
.../dc/dml/dcn314/display_mode_vba_314.c | 4 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 38 +-
drivers/gpu/drm/amd/display/dc/inc/link.h | 1 +
drivers/gpu/drm/amd/display/dc/inc/resource.h | 21 +-
.../display/dc/link/accessories/link_dp_cts.c | 2 +-
.../drm/amd/display/dc/link/link_factory.c | 1 +
.../link/protocols/link_edp_panel_control.c | 19 +
.../link/protocols/link_edp_panel_control.h | 1 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 18 +
.../amd/display/include/ddc_service_types.h | 1 +
45 files changed, 651 insertions(+), 705 deletions(-)
--
2.25.1
