[Public] > -----Original Message----- > From: Huang, JinHuiEric <JinHuiEric.Huang@xxxxxxx> > Sent: Tuesday, July 25, 2023 2:16 PM > To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Kim, Jonathan <Jonathan.Kim@xxxxxxx>; Huang, JinHuiEric > <JinHuiEric.Huang@xxxxxxx> > Subject: [PATCH] drm/amdgpu: enable trap of each kfd vmid for gfx v9.4.3 > > To setup ttmp on as default for gfx v9.4.3 in IP hw init. > > Signed-off-by: Eric Huang <jinhuieric.huang@xxxxxxx> Reviewed-by: Jonathan Kim <jonathan.kim@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c > b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c > index 86a84a0970f0..9a90fd187909 100644 > --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c > +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c > @@ -898,6 +898,7 @@ static void gfx_v9_4_3_xcc_init_compute_vmid(struct > amdgpu_device *adev, > int i; > uint32_t sh_mem_config; > uint32_t sh_mem_bases; > + uint32_t data; > > /* > * Configure apertures: > @@ -917,6 +918,11 @@ static void > gfx_v9_4_3_xcc_init_compute_vmid(struct amdgpu_device *adev, > /* CP and shaders */ > WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), > regSH_MEM_CONFIG, sh_mem_config); > WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), > regSH_MEM_BASES, sh_mem_bases); > + > + /* Enable trap for each kfd vmid. */ > + data = RREG32_SOC15(GC, GET_INST(GC, xcc_id), > regSPI_GDBG_PER_VMID_CNTL); > + data = REG_SET_FIELD(data, SPI_GDBG_PER_VMID_CNTL, > TRAP_EN, 1); > + WREG32_SOC15_RLC(GC, GET_INST(GC, xcc_id), > regSPI_GDBG_PER_VMID_CNTL, data); > } > soc15_grbm_select(adev, 0, 0, 0, 0, GET_INST(GC, xcc_id)); > mutex_unlock(&adev->srbm_mutex); > -- > 2.34.1
