Re: [PATCH v2 3/4] drm/amd/display: Set minimum requirement for using PSR-SU on Phoenix

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On 6/23/23 11:05, Mario Limonciello wrote:
The same parade TCON issue can potentially happen on Phoenix, and the same
PSR resilience changes have been ported into the DMUB firmware.

Don't allow running PSR-SU unless on the newer firmware.

Cc: Sean Wang <sean.ns.wang@xxxxxxx>
Cc: Marc Rossi <Marc.Rossi@xxxxxxx>
Cc: Hamza Mahfooz <Hamza.Mahfooz@xxxxxxx>
Cc: Tsung-hua (Ryan) Lin <Tsung-hua.Lin@xxxxxxx>
Signed-off-by: Mario Limonciello <mario.limonciello@xxxxxxx>

Reviewed-by: Leo Li <sunpeng.li@xxxxxxx>

---
v1->v2:
     * Fix a s/dcn31/dcn314/ mixup
---
  drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c | 5 +++++
  drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h | 2 ++
  drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c    | 1 +
  3 files changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c
index 48a06dbd9be7..f161aeb7e7c4 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.c
@@ -60,3 +60,8 @@ const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs = {
  	{ DMUB_DCN31_FIELDS() },
  #undef DMUB_SF
  };
+
+bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub)
+{
+	return dmub->fw_version >= DMUB_FW_VERSION(8, 0, 16);
+}
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h
index 674267a2940e..f213bd82c911 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_dcn314.h
@@ -30,4 +30,6 @@
extern const struct dmub_srv_dcn31_regs dmub_srv_dcn314_regs; +bool dmub_dcn314_is_psrsu_supported(struct dmub_srv *dmub);
+
  #endif /* _DMUB_DCN314_H_ */
diff --git a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
index 7a31e3e27bab..bdaf43892f47 100644
--- a/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
+++ b/drivers/gpu/drm/amd/display/dmub/src/dmub_srv.c
@@ -228,6 +228,7 @@ static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic)
  	case DMUB_ASIC_DCN316:
  		if (asic == DMUB_ASIC_DCN314) {
  			dmub->regs_dcn31 = &dmub_srv_dcn314_regs;
+			funcs->is_psrsu_supported = dmub_dcn314_is_psrsu_supported;
  		} else if (asic == DMUB_ASIC_DCN315) {
  			dmub->regs_dcn31 = &dmub_srv_dcn315_regs;
  		} else if (asic == DMUB_ASIC_DCN316) {



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