Re: [PATCH v3 11/12] drm/amdgpu: use doorbell mgr for MES kernel doorbells

[Christian König <christian.koenig@xxxxxxx>]

Am 20.06.23 um 19:16 schrieb Shashank Sharma:
> This patch:
> - Removes the existing doorbell management code, and its variables
>    from the doorbell_init function, it will be done in doorbell
>    manager now.
> - uses the doorbell page created for MES kernel level needs (doorbells
>    for MES self tests)
> - current MES code was allocating MES doorbells in MES process context,
>    but those were getting written using kernel doorbell calls. This patch
>    instead allocates a MES kernel doorbell for this (in add_hw_queue).
>
> V2: Create an extra page of doorbells for MES during kernel doorbell
>      creation (Alex)

As discussed on the other patch, this should probably be merged with 
patch #6 or otherwise we break the MES test in between.

Apart from that this patch set looks good to me now and is most likely 
ready to land.

Christian.

> Cc: Alex Deucher <alexander.deucher@xxxxxxx>
> Cc: Christian Koenig <christian.koenig@xxxxxxx>
> Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>
> Signed-off-by: Arvind Yadav <arvind.yadav@xxxxxxx>
> ---
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c | 94 ++++++++++---------------
>   drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h |  3 +
>   2 files changed, 40 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> index f0f00466b59f..01c3d27512d9 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.c
> @@ -67,91 +67,70 @@ unsigned int amdgpu_mes_get_doorbell_dw_offset_in_bar(
>   		doorbell_id * 2);
>   }
>   
> -static int amdgpu_mes_queue_doorbell_get(struct amdgpu_device *adev,
> +static int amdgpu_mes_kernel_doorbell_get(struct amdgpu_device *adev,
>   					 struct amdgpu_mes_process *process,
>   					 int ip_type, uint64_t *doorbell_index)
>   {
>   	unsigned int offset, found;
> +	struct amdgpu_mes *mes = &adev->mes;
>   
> -	if (ip_type == AMDGPU_RING_TYPE_SDMA) {
> +	if (ip_type == AMDGPU_RING_TYPE_SDMA)
>   		offset = adev->doorbell_index.sdma_engine[0];
> -		found = find_next_zero_bit(process->doorbell_bitmap,
> -					   AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS,
> -					   offset);
> -	} else {
> -		found = find_first_zero_bit(process->doorbell_bitmap,
> -					    AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS);
> -	}
> +	else
> +		offset = 0;
>   
> -	if (found >= AMDGPU_MES_MAX_NUM_OF_QUEUES_PER_PROCESS) {
> +	found = find_next_zero_bit(mes->doorbell_bitmap, mes->num_mes_dbs, offset);
> +	if (found >= mes->num_mes_dbs) {
>   		DRM_WARN("No doorbell available\n");
>   		return -ENOSPC;
>   	}
>   
> -	set_bit(found, process->doorbell_bitmap);
> -
> -	*doorbell_index = amdgpu_mes_get_doorbell_dw_offset_in_bar(adev,
> -				process->doorbell_index, found);
> +	set_bit(found, mes->doorbell_bitmap);
>   
> +	/* Get the absolute doorbell index on BAR */
> +	*doorbell_index = mes->db_start_dw_offset + found * 2;
>   	return 0;
>   }
>   
> -static void amdgpu_mes_queue_doorbell_free(struct amdgpu_device *adev,
> +static void amdgpu_mes_kernel_doorbell_free(struct amdgpu_device *adev,
>   					   struct amdgpu_mes_process *process,
>   					   uint32_t doorbell_index)
>   {
> -	unsigned int old, doorbell_id;
> -
> -	doorbell_id = doorbell_index -
> -		(process->doorbell_index *
> -		 amdgpu_mes_doorbell_process_slice(adev)) / sizeof(u32);
> -	doorbell_id /= 2;
> +	unsigned int old, rel_index;
> +	struct amdgpu_mes *mes = &adev->mes;
>   
> -	old = test_and_clear_bit(doorbell_id, process->doorbell_bitmap);
> +	/* Find the relative index of the doorbell in this object */
> +	rel_index = (doorbell_index - mes->db_start_dw_offset) / 2;
> +	old = test_and_clear_bit(rel_index, mes->doorbell_bitmap);
>   	WARN_ON(!old);
>   }
>   
>   static int amdgpu_mes_doorbell_init(struct amdgpu_device *adev)
>   {
> -	size_t doorbell_start_offset;
> -	size_t doorbell_aperture_size;
> -	size_t doorbell_process_limit;
> -	size_t aggregated_doorbell_start;
>   	int i;
> +	struct amdgpu_mes *mes = &adev->mes;
>   
> -	aggregated_doorbell_start = (adev->doorbell_index.max_assignment + 1) * sizeof(u32);
> -	aggregated_doorbell_start =
> -		roundup(aggregated_doorbell_start, PAGE_SIZE);
> -
> -	doorbell_start_offset = aggregated_doorbell_start + PAGE_SIZE;
> -	doorbell_start_offset =
> -		roundup(doorbell_start_offset,
> -			amdgpu_mes_doorbell_process_slice(adev));
> -
> -	doorbell_aperture_size = adev->doorbell.size;
> -	doorbell_aperture_size =
> -			rounddown(doorbell_aperture_size,
> -				  amdgpu_mes_doorbell_process_slice(adev));
> -
> -	if (doorbell_aperture_size > doorbell_start_offset)
> -		doorbell_process_limit =
> -			(doorbell_aperture_size - doorbell_start_offset) /
> -			amdgpu_mes_doorbell_process_slice(adev);
> -	else
> -		return -ENOSPC;
> -
> -	adev->mes.doorbell_id_offset = doorbell_start_offset / sizeof(u32);
> -	adev->mes.max_doorbell_slices = doorbell_process_limit;
> +	/* Bitmap for dynamic allocation of kernel doorbells */
> +	mes->doorbell_bitmap = bitmap_zalloc(PAGE_SIZE / sizeof(u32), GFP_KERNEL);
> +	if (!mes->doorbell_bitmap) {
> +		DRM_ERROR("Failed to allocate MES doorbell bitmap\n");
> +		return -ENOMEM;
> +	}
>   
> -	/* allocate Qword range for aggregated doorbell */
> -	for (i = 0; i < AMDGPU_MES_PRIORITY_NUM_LEVELS; i++)
> -		adev->mes.aggregated_doorbells[i] =
> -			aggregated_doorbell_start / sizeof(u32) + i * 2;
> +	mes->num_mes_dbs = PAGE_SIZE / AMDGPU_ONE_DOORBELL_SIZE;
> +	for (i = 0; i < AMDGPU_MES_PRIORITY_NUM_LEVELS; i++) {
> +		adev->mes.aggregated_doorbells[i] = mes->db_start_dw_offset + i * 2;
> +		set_bit(i, mes->doorbell_bitmap);
> +	}
>   
> -	DRM_INFO("max_doorbell_slices=%zu\n", doorbell_process_limit);
>   	return 0;
>   }
>   
> +static void amdgpu_mes_doorbell_free(struct amdgpu_device *adev)
> +{
> +	bitmap_free(adev->mes.doorbell_bitmap);
> +}
> +
>   int amdgpu_mes_init(struct amdgpu_device *adev)
>   {
>   	int i, r;
> @@ -250,6 +229,7 @@ void amdgpu_mes_fini(struct amdgpu_device *adev)
>   	amdgpu_device_wb_free(adev, adev->mes.sch_ctx_offs);
>   	amdgpu_device_wb_free(adev, adev->mes.query_status_fence_offs);
>   	amdgpu_device_wb_free(adev, adev->mes.read_val_offs);
> +	amdgpu_mes_doorbell_free(adev);
>   
>   	idr_destroy(&adev->mes.pasid_idr);
>   	idr_destroy(&adev->mes.gang_id_idr);
> @@ -679,7 +659,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
>   	*queue_id = queue->queue_id = r;
>   
>   	/* allocate a doorbell index for the queue */
> -	r = amdgpu_mes_queue_doorbell_get(adev, gang->process,
> +	r = amdgpu_mes_kernel_doorbell_get(adev, gang->process,
>   					  qprops->queue_type,
>   					  &qprops->doorbell_off);
>   	if (r)
> @@ -737,7 +717,7 @@ int amdgpu_mes_add_hw_queue(struct amdgpu_device *adev, int gang_id,
>   	return 0;
>   
>   clean_up_doorbell:
> -	amdgpu_mes_queue_doorbell_free(adev, gang->process,
> +	amdgpu_mes_kernel_doorbell_free(adev, gang->process,
>   				       qprops->doorbell_off);
>   clean_up_queue_id:
>   	spin_lock_irqsave(&adev->mes.queue_id_lock, flags);
> @@ -792,7 +772,7 @@ int amdgpu_mes_remove_hw_queue(struct amdgpu_device *adev, int queue_id)
>   			  queue_id);
>   
>   	list_del(&queue->list);
> -	amdgpu_mes_queue_doorbell_free(adev, gang->process,
> +	amdgpu_mes_kernel_doorbell_free(adev, gang->process,
>   				       queue->doorbell_off);
>   	amdgpu_mes_unlock(&adev->mes);
>   
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> index a403418d5eac..2c604e04fd5c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_mes.h
> @@ -27,6 +27,7 @@
>   #include "amdgpu_irq.h"
>   #include "kgd_kfd_interface.h"
>   #include "amdgpu_gfx.h"
> +#include "amdgpu_doorbell.h"
>   #include <linux/sched/mm.h>
>   
>   #define AMDGPU_MES_MAX_COMPUTE_PIPES        8
> @@ -130,6 +131,8 @@ struct amdgpu_mes {
>   
>   	/* MES doorbells */
>   	uint32_t			db_start_dw_offset;
> +	uint32_t			num_mes_dbs;
> +	unsigned long			*doorbell_bitmap;
>   
>   	/* ip specific functions */
>   	const struct amdgpu_mes_funcs   *funcs;