RE: [PATCH 3/3] drm/amdgpu: Remove unused NBIO interface

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[AMD Official Use Only - General]

Series is Reviewed-by: Le Ma <le.ma@xxxxxxx>

> -----Original Message-----
> From: Lazar, Lijo <Lijo.Lazar@xxxxxxx>
> Sent: Tuesday, June 13, 2023 6:54 PM
> To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
> Cc: Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Deucher, Alexander
> <Alexander.Deucher@xxxxxxx>; Kamal, Asad <Asad.Kamal@xxxxxxx>; Ma,
> Le <Le.Ma@xxxxxxx>
> Subject: [PATCH 3/3] drm/amdgpu: Remove unused NBIO interface
>
> Set compute partition mode interface in NBIO is no longer used. Remove the
> only implementation from NBIO v7.9
>
> Signed-off-by: Lijo Lazar <lijo.lazar@xxxxxxx>
> ---
>  drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h |  2 --
>  drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c   | 14 --------------
>  2 files changed, 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
> b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
> index 095aecfb201e..8ab8ae01f87c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_nbio.h
> @@ -99,8 +99,6 @@ struct amdgpu_nbio_funcs {
>       int (*get_compute_partition_mode)(struct amdgpu_device *adev);
>       u32 (*get_memory_partition_mode)(struct amdgpu_device *adev,
>                                        u32 *supp_modes);
> -     void (*set_compute_partition_mode)(struct amdgpu_device *adev,
> -                                        enum amdgpu_gfx_partition mode);
>  };
>
>  struct amdgpu_nbio {
> diff --git a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> index b033935d6749..cd1a02d30420 100644
> --- a/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> +++ b/drivers/gpu/drm/amd/amdgpu/nbio_v7_9.c
> @@ -393,19 +393,6 @@ static int
> nbio_v7_9_get_compute_partition_mode(struct amdgpu_device *adev)
>       return px;
>  }
>
> -static void nbio_v7_9_set_compute_partition_mode(struct amdgpu_device
> *adev,
> -                                     enum amdgpu_gfx_partition mode)
> -{
> -     u32 tmp;
> -
> -     /* SPX=0, DPX=1, TPX=2, QPX=3, CPX=4 */
> -     tmp = RREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_PARTITION_COMPUTE_STATUS);
> -     tmp = REG_SET_FIELD(tmp,
> BIF_BX_PF0_PARTITION_COMPUTE_STATUS,
> -                         PARTITION_MODE, mode);
> -
> -     WREG32_SOC15(NBIO, 0,
> regBIF_BX_PF0_PARTITION_COMPUTE_STATUS, tmp);
> -}
> -
>  static u32 nbio_v7_9_get_memory_partition_mode(struct amdgpu_device
> *adev,
>                                              u32 *supp_modes)
>  {
> @@ -461,7 +448,6 @@ const struct amdgpu_nbio_funcs nbio_v7_9_funcs = {
>       .ih_control = nbio_v7_9_ih_control,
>       .remap_hdp_registers = nbio_v7_9_remap_hdp_registers,
>       .get_compute_partition_mode =
> nbio_v7_9_get_compute_partition_mode,
> -     .set_compute_partition_mode =
> nbio_v7_9_set_compute_partition_mode,
>       .get_memory_partition_mode =
> nbio_v7_9_get_memory_partition_mode,
>       .init_registers = nbio_v7_9_init_registers,  };
> --
> 2.25.1





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