Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
On Wed, Jun 7, 2023 at 7:09 AM shikaguo <shikai.guo@xxxxxxx> wrote:
>
> This patch enables following UMD stable Pstates profile levels for power_dpm_force_performance_level interface.
>
> - profile_peak
> - profile_min_mclk
> - profile_min_sclk
> - profile_standard
>
> Signed-off-by: shikaguo <shikai.guo@xxxxxxx>
> ---
> .../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c | 94 ++++++++++++++++++-
> .../drm/amd/pm/swsmu/smu13/yellow_carp_ppt.h | 8 +-
> 2 files changed, 98 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> index a92da336ecec..5c968ab2ea8d 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.c
> @@ -957,6 +957,9 @@ static int yellow_carp_set_soft_freq_limited_range(struct smu_context *smu,
> uint32_t max)
> {
> enum smu_message_type msg_set_min, msg_set_max;
> + uint32_t min_clk = min;
> + uint32_t max_clk = max;
> +
> int ret = 0;
>
> if (!yellow_carp_clk_dpm_is_enabled(smu, clk_type))
> @@ -985,11 +988,17 @@ static int yellow_carp_set_soft_freq_limited_range(struct smu_context *smu,
> return -EINVAL;
> }
>
> - ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_min, min, NULL);
> + if (clk_type == SMU_VCLK) {
> + min_clk = min << SMU_13_VCLK_SHIFT;
> + max_clk = max << SMU_13_VCLK_SHIFT;
> + }
> +
> + ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_min, min_clk, NULL);
> +
> if (ret)
> goto out;
>
> - ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_max, max, NULL);
> + ret = smu_cmn_send_smc_msg_with_param(smu, msg_set_max, max_clk, NULL);
> if (ret)
> goto out;
>
> @@ -1107,6 +1116,50 @@ static int yellow_carp_force_clk_levels(struct smu_context *smu,
> return ret;
> }
>
> +static int yellow_carp_get_dpm_profile_freq(struct smu_context *smu,
> + enum amd_dpm_forced_level level,
> + enum smu_clk_type clk_type,
> + uint32_t *min_clk,
> + uint32_t *max_clk)
> +{
> + int ret = 0;
> + uint32_t clk_limit = 0;
> +
> + switch (clk_type) {
> + case SMU_GFXCLK:
> + case SMU_SCLK:
> + clk_limit = YELLOW_CARP_UMD_PSTATE_GFXCLK;
> + if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_SCLK, NULL, &clk_limit);
> + else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK)
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_SCLK, &clk_limit, NULL);
> + break;
> + case SMU_SOCCLK:
> + clk_limit = YELLOW_CARP_UMD_PSTATE_SOCCLK;
> + if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_SOCCLK, NULL, &clk_limit);
> + break;
> + case SMU_FCLK:
> + clk_limit = YELLOW_CARP_UMD_PSTATE_FCLK;
> + if (level == AMD_DPM_FORCED_LEVEL_PROFILE_PEAK)
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_FCLK, NULL, &clk_limit);
> + else if (level == AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK)
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_FCLK, &clk_limit, NULL);
> + break;
> + case SMU_VCLK:
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_VCLK, NULL, &clk_limit);
> + break;
> + case SMU_DCLK:
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_DCLK, NULL, &clk_limit);
> + break;
> + default:
> + ret = -EINVAL;
> + break;
> + }
> + *min_clk = *max_clk = clk_limit;
> + return ret;
> +}
> +
> static int yellow_carp_set_performance_level(struct smu_context *smu,
> enum amd_dpm_forced_level level)
> {
> @@ -1114,6 +1167,9 @@ static int yellow_carp_set_performance_level(struct smu_context *smu,
> uint32_t sclk_min = 0, sclk_max = 0;
> uint32_t fclk_min = 0, fclk_max = 0;
> uint32_t socclk_min = 0, socclk_max = 0;
> + uint32_t vclk_min = 0, vclk_max = 0;
> + uint32_t dclk_min = 0, dclk_max = 0;
> +
> int ret = 0;
>
> switch (level) {
> @@ -1121,28 +1177,42 @@ static int yellow_carp_set_performance_level(struct smu_context *smu,
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SCLK, NULL, &sclk_max);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_FCLK, NULL, &fclk_max);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SOCCLK, NULL, &socclk_max);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_VCLK, NULL, &vclk_max);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_DCLK, NULL, &dclk_max);
> sclk_min = sclk_max;
> fclk_min = fclk_max;
> socclk_min = socclk_max;
> + vclk_min = vclk_max;
> + dclk_min = dclk_max;
> break;
> case AMD_DPM_FORCED_LEVEL_LOW:
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SCLK, &sclk_min, NULL);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_FCLK, &fclk_min, NULL);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SOCCLK, &socclk_min, NULL);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_VCLK, &vclk_min, NULL);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_DCLK, &dclk_min, NULL);
> sclk_max = sclk_min;
> fclk_max = fclk_min;
> socclk_max = socclk_min;
> + vclk_max = vclk_min;
> + dclk_max = dclk_min;
> break;
> case AMD_DPM_FORCED_LEVEL_AUTO:
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SCLK, &sclk_min, &sclk_max);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_FCLK, &fclk_min, &fclk_max);
> yellow_carp_get_dpm_ultimate_freq(smu, SMU_SOCCLK, &socclk_min, &socclk_max);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_VCLK, &vclk_min, &vclk_max);
> + yellow_carp_get_dpm_ultimate_freq(smu, SMU_DCLK, &dclk_min, &dclk_max);
> break;
> case AMD_DPM_FORCED_LEVEL_PROFILE_STANDARD:
> case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_SCLK:
> case AMD_DPM_FORCED_LEVEL_PROFILE_MIN_MCLK:
> case AMD_DPM_FORCED_LEVEL_PROFILE_PEAK:
> - /* Temporarily do nothing since the optimal clocks haven't been provided yet */
> + yellow_carp_get_dpm_profile_freq(smu, level, SMU_SCLK, &sclk_min, &sclk_max);
> + yellow_carp_get_dpm_profile_freq(smu, level, SMU_FCLK, &fclk_min, &fclk_max);
> + yellow_carp_get_dpm_profile_freq(smu, level, SMU_SOCCLK, &socclk_min, &socclk_max);
> + yellow_carp_get_dpm_profile_freq(smu, level, SMU_VCLK, &vclk_min, &vclk_max);
> + yellow_carp_get_dpm_profile_freq(smu, level, SMU_DCLK, &dclk_min, &dclk_max);
> break;
> case AMD_DPM_FORCED_LEVEL_MANUAL:
> case AMD_DPM_FORCED_LEVEL_PROFILE_EXIT:
> @@ -1182,6 +1252,24 @@ static int yellow_carp_set_performance_level(struct smu_context *smu,
> return ret;
> }
>
> + if (vclk_min && vclk_max) {
> + ret = yellow_carp_set_soft_freq_limited_range(smu,
> + SMU_VCLK,
> + vclk_min,
> + vclk_max);
> + if (ret)
> + return ret;
> + }
> +
> + if (dclk_min && dclk_max) {
> + ret = yellow_carp_set_soft_freq_limited_range(smu,
> + SMU_DCLK,
> + dclk_min,
> + dclk_max);
> + if (ret)
> + return ret;
> + }
> +
> return ret;
> }
>
> diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.h b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.h
> index a9205a8ea3ad..59257bbd66e0 100644
> --- a/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.h
> +++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/yellow_carp_ppt.h
> @@ -24,6 +24,12 @@
> #define __YELLOW_CARP_PPT_H__
>
> extern void yellow_carp_set_ppt_funcs(struct smu_context *smu);
> -#define YELLOW_CARP_UMD_PSTATE_GFXCLK 1100
> +
> +#define SMU_13_VCLK_SHIFT 16
> +
> +//UMD PState Rembrandt Msg Parameters in MHz
> +#define YELLOW_CARP_UMD_PSTATE_GFXCLK 700
> +#define YELLOW_CARP_UMD_PSTATE_SOCCLK 678
> +#define YELLOW_CARP_UMD_PSTATE_FCLK 800
>
> #endif
> --
> 2.25.1
>
