[AMD Official Use Only - General]
Ping......
Best wishes
Emily Deng
>-----Original Message-----
>From: Emily Deng <Emily.Deng@xxxxxxx>
>Sent: Tuesday, June 6, 2023 2:52 PM
>To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
>Cc: Deng, Emily <Emily.Deng@xxxxxxx>
>Subject: [PATCH] drm/amdgpu/mmsch: Correct the definition for mmsch init
>header
>
>For the header, it is version related, shouldn't use MAX_VCN_INSTANCES.
>
>Signed-off-by: Emily Deng <Emily.Deng@xxxxxxx>
>---
> drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h | 4 +++-
>drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h | 4 +++-
> drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c | 2 +-
> drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c | 2 +-
> 4 files changed, 8 insertions(+), 4 deletions(-)
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
>b/drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
>index 3e4e858a6965..a773ef61b78c 100644
>--- a/drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
>+++ b/drivers/gpu/drm/amd/amdgpu/mmsch_v3_0.h
>@@ -30,6 +30,8 @@
> #define MMSCH_VERSION_MINOR 0
> #define MMSCH_VERSION (MMSCH_VERSION_MAJOR << 16 |
>MMSCH_VERSION_MINOR)
>
>+#define MMSCH_V3_0_VCN_INSTANCES 0x2
>+
> enum mmsch_v3_0_command_type {
> MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
> MMSCH_COMMAND__DIRECT_REG_POLLING = 2, @@ -47,7 +49,7
>@@ struct mmsch_v3_0_table_info { struct mmsch_v3_0_init_header {
> uint32_t version;
> uint32_t total_size;
>- struct mmsch_v3_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES];
>+ struct mmsch_v3_0_table_info inst[MMSCH_V3_0_VCN_INSTANCES];
> };
>
> struct mmsch_v3_0_cmd_direct_reg_header { diff --git
>a/drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
>b/drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
>index 83653a50a1a2..796d4f8791e5 100644
>--- a/drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
>+++ b/drivers/gpu/drm/amd/amdgpu/mmsch_v4_0.h
>@@ -43,6 +43,8 @@
> #define MMSCH_VF_MAILBOX_RESP__OK 0x1
> #define MMSCH_VF_MAILBOX_RESP__INCOMPLETE 0x2
>
>+#define MMSCH_V4_0_VCN_INSTANCES 0x2
>+
> enum mmsch_v4_0_command_type {
> MMSCH_COMMAND__DIRECT_REG_WRITE = 0,
> MMSCH_COMMAND__DIRECT_REG_POLLING = 2, @@ -60,7 +62,7
>@@ struct mmsch_v4_0_table_info { struct mmsch_v4_0_init_header {
> uint32_t version;
> uint32_t total_size;
>- struct mmsch_v4_0_table_info inst[AMDGPU_MAX_VCN_INSTANCES];
>+ struct mmsch_v4_0_table_info inst[MMSCH_V4_0_VCN_INSTANCES];
> struct mmsch_v4_0_table_info jpegdec;
> };
>
>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>index 70fefbf26c48..c8f63b3c6f69 100644
>--- a/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v3_0.c
>@@ -1313,7 +1313,7 @@ static int vcn_v3_0_start_sriov(struct
>amdgpu_device *adev)
>
> header.version = MMSCH_VERSION;
> header.total_size = sizeof(struct mmsch_v3_0_init_header) >> 2;
>- for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) {
>+ for (i = 0; i < MMSCH_V3_0_VCN_INSTANCES; i++) {
> header.inst[i].init_status = 0;
> header.inst[i].table_offset = 0;
> header.inst[i].table_size = 0;
>diff --git a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>index 60c3fd20e8ce..8d371faaa2b3 100644
>--- a/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>+++ b/drivers/gpu/drm/amd/amdgpu/vcn_v4_0.c
>@@ -1239,7 +1239,7 @@ static int vcn_v4_0_start_sriov(struct
>amdgpu_device *adev)
>
> header.version = MMSCH_VERSION;
> header.total_size = sizeof(struct mmsch_v4_0_init_header) >> 2;
>- for (i = 0; i < AMDGPU_MAX_VCN_INSTANCES; i++) {
>+ for (i = 0; i < MMSCH_V4_0_VCN_INSTANCES; i++) {
> header.inst[i].init_status = 0;
> header.inst[i].table_offset = 0;
> header.inst[i].table_size = 0;
>--
>2.36.1
