[AMD Official Use Only - General] Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx> Regards, Hawking -----Original Message----- From: amd-gfx <amd-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Shiwu Zhang Sent: Thursday, May 18, 2023 20:21 To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Subject: [PATCH v2 6/6] drm/amdgpu: complement the 4, 6 and 8 XCC cases Signed-off-by: Shiwu Zhang <shiwu.zhang@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c index e5cfb3adb3b3..97f6f854d077 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_4_3.c @@ -1031,6 +1031,9 @@ static void gfx_v9_4_3_xcc_program_xcc_id(struct amdgpu_device *adev, WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, 0x8); break; case 2: + case 4: + case 6: + case 8: tmp = (xcc_id % adev->gfx.num_xcc_per_xcp) << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, VIRTUAL_XCC_ID); tmp = tmp | (adev->gfx.num_xcc_per_xcp << REG_FIELD_SHIFT(CP_HYP_XCP_CTL, NUM_XCC_IN_XCP)); WREG32_SOC15(GC, GET_INST(GC, xcc_id), regCP_HYP_XCP_CTL, tmp); -- 2.17.1
