Series is:
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
On Thu, May 18, 2023 at 3:04 AM Guchun Chen <guchun.chen@xxxxxxx> wrote:
>
> sched.ready is nothing with ring initialization, it needs to set
> to be true after ring/IB test in amdgpu_ring_test_helper to tell
> the ring is ready for submission.
>
> Signed-off-by: Guchun Chen <guchun.chen@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/cik_sdma.c | 2 --
> drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c | 2 --
> drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c | 2 --
> drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c | 4 ----
> drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c | 4 ----
> drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c | 2 --
> drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c | 4 ++--
> drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c | 6 +-----
> drivers/gpu/drm/amd/amdgpu/si_dma.c | 2 --
> 9 files changed, 3 insertions(+), 25 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> index 67d16236b216..52598fbc9b39 100644
> --- a/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/cik_sdma.c
> @@ -489,8 +489,6 @@ static int cik_sdma_gfx_resume(struct amdgpu_device *adev)
> #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> cik_sdma_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> index fd2a7b66ac56..51afc92994a8 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v2_4.c
> @@ -466,8 +466,6 @@ static int sdma_v2_4_gfx_resume(struct amdgpu_device *adev)
> #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> sdma_v2_4_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> index e572389089d2..344202870aeb 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v3_0.c
> @@ -734,8 +734,6 @@ static int sdma_v3_0_gfx_resume(struct amdgpu_device *adev)
> #endif
> /* enable DMA IBs */
> WREG32(mmSDMA0_GFX_IB_CNTL + sdma_offsets[i], ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> /* unhalt the MEs */
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> index 9295ac7edd56..e3581852ed9c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_0.c
> @@ -1114,8 +1114,6 @@ static void sdma_v4_0_gfx_resume(struct amdgpu_device *adev, unsigned int i)
> #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, mmSDMA0_GFX_IB_CNTL, ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> /**
> @@ -1202,8 +1200,6 @@ static void sdma_v4_0_page_resume(struct amdgpu_device *adev, unsigned int i)
> #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, mmSDMA0_PAGE_IB_CNTL, ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> static void
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> index 64dcaa2670dd..c3517d9fc38c 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c
> @@ -659,8 +659,6 @@ static void sdma_v4_4_2_gfx_resume(struct amdgpu_device *adev, unsigned int i)
> #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, regSDMA_GFX_IB_CNTL, ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> /**
> @@ -750,8 +748,6 @@ static void sdma_v4_4_2_page_resume(struct amdgpu_device *adev, unsigned int i)
> #endif
> /* enable DMA IBs */
> WREG32_SDMA(i, regSDMA_PAGE_IB_CNTL, ib_cntl);
> -
> - ring->sched.ready = true;
> }
>
> static void sdma_v4_4_2_init_pg(struct amdgpu_device *adev)
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> index 92e1299be021..e2fe539ff3ed 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c
> @@ -819,8 +819,6 @@ static int sdma_v5_0_gfx_resume(struct amdgpu_device *adev)
> /* enable DMA IBs */
> WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);
>
> - ring->sched.ready = true;
> -
> if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */
> sdma_v5_0_ctx_switch_enable(adev, true);
> sdma_v5_0_enable(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> index ca7e8757d78e..23667605c372 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c
> @@ -617,8 +617,6 @@ static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)
> /* enable DMA IBs */
> WREG32_SOC15_IP(GC, sdma_v5_2_get_reg_offset(adev, i, mmSDMA0_GFX_IB_CNTL), ib_cntl);
>
> - ring->sched.ready = true;
> -
> if (amdgpu_sriov_vf(adev)) { /* bare-metal sequence doesn't need below to lines */
> sdma_v5_2_ctx_switch_enable(adev, true);
> sdma_v5_2_enable(adev, true);
> @@ -630,6 +628,8 @@ static int sdma_v5_2_gfx_resume(struct amdgpu_device *adev)
> return r;
> }
>
> + ring->sched.ready = true;
> +
> if (adev->mman.buffer_funcs_ring == ring)
> amdgpu_ttm_set_buffer_funcs_status(adev, true);
> }
> diff --git a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> index 3d9a80511a45..280a878cad68 100644
> --- a/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/sdma_v6_0.c
> @@ -585,16 +585,12 @@ static int sdma_v6_0_gfx_resume(struct amdgpu_device *adev)
> /* enable DMA IBs */
> WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_QUEUE0_IB_CNTL), ib_cntl);
>
> - ring->sched.ready = true;
> -
> if (amdgpu_sriov_vf(adev))
> sdma_v6_0_enable(adev, true);
>
> r = amdgpu_ring_test_helper(ring);
> - if (r) {
> - ring->sched.ready = false;
> + if (r)
> return r;
> - }
>
> if (adev->mman.buffer_funcs_ring == ring)
> amdgpu_ttm_set_buffer_funcs_status(adev, true);
> diff --git a/drivers/gpu/drm/amd/amdgpu/si_dma.c b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> index abca8b529721..42c4547f32ec 100644
> --- a/drivers/gpu/drm/amd/amdgpu/si_dma.c
> +++ b/drivers/gpu/drm/amd/amdgpu/si_dma.c
> @@ -174,8 +174,6 @@ static int si_dma_start(struct amdgpu_device *adev)
> WREG32(DMA_RB_WPTR + sdma_offsets[i], ring->wptr << 2);
> WREG32(DMA_RB_CNTL + sdma_offsets[i], rb_cntl | DMA_RB_ENABLE);
>
> - ring->sched.ready = true;
> -
> r = amdgpu_ring_test_helper(ring);
> if (r)
> return r;
> --
> 2.25.1
>
