RE: [PATCH] drm/amdgpu: fix incorrect pcie_gen_mask in passthrough case

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[AMD Official Use Only - General]

Hi Alexander,

Can you help review this patch again? I have double checked and refined the sequence compared to previous one. Thanks a lot!

Kind regards,
Esther

-----Original Message-----
From: Tong Liu01 <Tong.Liu01@xxxxxxx>
Sent: Thursday, May 18, 2023 11:12 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Quan, Evan <Evan.Quan@xxxxxxx>; Chen, Horace <Horace.Chen@xxxxxxx>; Tuikov, Luben <Luben.Tuikov@xxxxxxx>; Koenig, Christian <Christian.Koenig@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; Xiao, Jack <Jack.Xiao@xxxxxxx>; Zhang, Hawking <Hawking.Zhang@xxxxxxx>; Liu, Monk <Monk.Liu@xxxxxxx>; Xu, Feifei <Feifei.Xu@xxxxxxx>; Chang, HaiJun <HaiJun.Chang@xxxxxxx>; Liu01, Tong (Esther) <Tong.Liu01@xxxxxxx>
Subject: [PATCH] drm/amdgpu: fix incorrect pcie_gen_mask in passthrough case

[why]
Passthrough case is treated as root bus and pcie_gen_mask is set as default value that does not support GEN 3 and GEN 4 for PCIe link speed. So PCIe link speed will be downgraded at smu hw init in passthrough condition

[how]
Move get pci info after detect virtualization and check if it is passthrough case when set pcie_gen_mask

Signed-off-by: Tong Liu01 <Tong.Liu01@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index a9d9bbe8586b..18c6e9872247 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3813,8 +3813,6 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        DRM_INFO("register mmio base: 0x%08X\n", (uint32_t)adev->rmmio_base);
        DRM_INFO("register mmio size: %u\n", (unsigned)adev->rmmio_size);

-       amdgpu_device_get_pcie_info(adev);
-
        if (amdgpu_mcbp)
                DRM_INFO("MCBP is enabled\n");

@@ -3830,6 +3828,8 @@ int amdgpu_device_init(struct amdgpu_device *adev,
        /* detect hw virtualization here */
        amdgpu_detect_virtualization(adev);

+       amdgpu_device_get_pcie_info(adev);
+
        r = amdgpu_device_get_job_timeout_settings(adev);
        if (r) {
                dev_err(adev->dev, "invalid lockup_timeout parameter syntax\n"); @@ -5589,7 +5589,7 @@ static void amdgpu_device_get_pcie_info(struct amdgpu_device *adev)
                adev->pm.pcie_mlw_mask = amdgpu_pcie_lane_cap;

        /* covers APUs as well */
-       if (pci_is_root_bus(adev->pdev->bus)) {
+       if (pci_is_root_bus(adev->pdev->bus) && !amdgpu_passthrough(adev)) {
                if (adev->pm.pcie_gen_mask == 0)
                        adev->pm.pcie_gen_mask = AMDGPU_DEFAULT_PCIE_GEN_MASK;
                if (adev->pm.pcie_mlw_mask == 0)
--
2.34.1





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