From: Tao Zhou <tao.zhou1@xxxxxxx>
Not all ASICs support GFX CP ECC irq.
Signed-off-by: Tao Zhou <tao.zhou1@xxxxxxx>
Reviewed-by: Hawking Zhang <Hawking.Zhang@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c | 8 ++------
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
index 5218d4837656..dc0e5d18a0cc 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
@@ -786,17 +786,13 @@ int amdgpu_gfx_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *r
if (r)
return r;
- r = amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0);
- if (r)
- goto late_fini;
+ /* Not all ASICs support the irq, no need to check return value */
+ amdgpu_irq_get(adev, &adev->gfx.cp_ecc_error_irq, 0);
} else {
amdgpu_ras_feature_enable_on_boot(adev, ras_block, 0);
}
return 0;
-late_fini:
- amdgpu_ras_block_late_fini(adev, ras_block);
- return r;
}
int amdgpu_gfx_ras_sw_init(struct amdgpu_device *adev)
--
2.40.1
