[PATCH 10/12] drm/amdgpu/gfx10: always restore kcq/kgq MQDs

[Alex Deucher <alexander.deucher@xxxxxxx>]

Always restore the MQD not just when we do a reset.
This allows us to move the MQD to VRAM if we want.

Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c | 29 +++++++++++++-------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
index 5c67c91c4297..c6afaa375b11 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
@@ -6447,15 +6447,16 @@ static int gfx_v10_0_gfx_init_queue(struct amdgpu_ring *ring)
 		mutex_unlock(&adev->srbm_mutex);
 		if (adev->gfx.me.mqd_backup[mqd_idx])
 			memcpy(adev->gfx.me.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
-	} else if (amdgpu_in_reset(adev)) {
-		/* reset mqd with the backup copy */
+	} else {
+		/* restore mqd with the backup copy */
 		if (adev->gfx.me.mqd_backup[mqd_idx])
 			memcpy(mqd, adev->gfx.me.mqd_backup[mqd_idx], sizeof(*mqd));
-		/* reset the ring */
-		ring->wptr = 0;
-		*ring->wptr_cpu_addr = 0;
-		amdgpu_ring_clear_ring(ring);
-	} else {
+
+		if (amdgpu_in_reset(adev)) {
+			/* reset the ring */
+			ring->wptr = 0;
+			*ring->wptr_cpu_addr = 0;
+		}
 		amdgpu_ring_clear_ring(ring);
 	}
 
@@ -6780,16 +6781,16 @@ static int gfx_v10_0_kcq_init_queue(struct amdgpu_ring *ring)
 
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
 			memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(*mqd));
-	} else if (amdgpu_in_reset(adev)) { /* for GPU_RESET case */
-		/* reset MQD to a clean status */
+	} else {
+		/* restore MQD to a clean status */
 		if (adev->gfx.mec.mqd_backup[mqd_idx])
 			memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(*mqd));
 
-		/* reset ring buffer */
-		ring->wptr = 0;
-		atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
-		amdgpu_ring_clear_ring(ring);
-	} else {
+		if (amdgpu_in_reset(adev)) {
+			/* reset ring buffer */
+			ring->wptr = 0;
+			atomic64_set((atomic64_t *)ring->wptr_cpu_addr, 0);
+		}
 		amdgpu_ring_clear_ring(ring);
 	}
 
-- 
2.40.0