Thanks Hawking. I will update.
Regards,
Stanley
From: Zhang, Hawking <Hawking.Zhang@xxxxxxx>
Sent: Tuesday, April 11, 2023 12:05 PM
To: Yang, Stanley <Stanley.Yang@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx; Zhou1, Tao <Tao.Zhou1@xxxxxxx>
Cc: Yang, Stanley <Stanley.Yang@xxxxxxx>
Subject: Re: [PATCH Review 2/2] drm/amdgpu: correct ras enabled flag
[AMD Official Use Only - General]
Just check gmc.xmgi.num_physical_nodes == 0 should be good enough for the case that we only have single ALDEBRAN/ARCURUS available in system.
In such case, there is no need to expose xgmi_wafl ras node.
Regards,
Hawking
XGMI RAS should be according to the gmc xmgi supported flag
and xgmi physical nodes number.
Change-Id: Idf3600b30584b10b528e7237d103d84d5097b7e0
Signed-off-by: Stanley.Yang <Stanley.Yang@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
index 4069bce9479f..d26a93272bf2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ras.c
@@ -2430,6 +2430,14 @@ static void amdgpu_ras_check_supported(struct amdgpu_device *adev)
else
adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__VCN |
1 << AMDGPU_RAS_BLOCK__JPEG);
+
+ /*
+ * XGMI RAS is determined by xgmi supported flags
+ * and xgmi num physical nodes
+ */
+ if (!adev->gmc.xgmi.supported ||
+ adev->gmc.xmgi.num_physical_nodes == 0)
+ adev->ras_hw_enabled &= ~(1 << AMDGPU_RAS_BLOCK__XGMI_WAFL);
} else {
dev_info(adev->dev, "SRAM ECC is not presented.\n");
}
--
2.17.1
|