On 30/03/2023 16:33, Alex Deucher wrote:
On Wed, Mar 29, 2023 at 11:48 AM Shashank Sharma <shashank.sharma@xxxxxxx> wrote:From: Shashank Sharma <contactshashanksharma@xxxxxxxxx> This patch initialzes the ttm resource manager for doorbells. Cc: Alex Deucher <alexander.deucher@xxxxxxx> Cc: Christian Koenig <christian.koenig@xxxxxxx> Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx> --- drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index 6f61491ef3dd..203d77a20507 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c @@ -1858,6 +1858,14 @@ int amdgpu_ttm_init(struct amdgpu_device *adev) DRM_INFO("amdgpu: %uM of GTT memory ready.\n", (unsigned)(gtt_size / (1024 * 1024))); + /* Initiailize doorbell pool on PCI BAR */ + r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_DOORBELL, + DIV_ROUND_UP(adev->doorbell.size, PAGE_SIZE));In practice this would never be an issue since the PCI BAR is always at least 2M, but I think we probably don't want to round up here? I guess large pages would be a problem, but so would going beyond the BAR.
Agree, will take care of this. - Shashank
Alex+ if (r) { + DRM_ERROR("Failed initializing doorbell heap. \n"); + return r; + } + /* Initialize preemptible memory pool */ r = amdgpu_preempt_mgr_init(adev); if (r) { -- 2.40.0
