On Wed, Mar 29, 2023 at 11:48 AM Shashank Sharma
<shashank.sharma@xxxxxxx> wrote:
>
> From: Shashank Sharma <contactshashanksharma@xxxxxxxxx>
>
> This patch removes the check and change in num_kernel_doorbells
> for MES, which is not being used anywhere by MES code.
>
> Cc: Alex Deucher <alexander.deucher@xxxxxxx>
> Cc: Christian Koenig <christian.koenig@xxxxxxx>
> Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>
Acked-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> .../gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c | 34 ++++++++-----------
> 1 file changed, 15 insertions(+), 19 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> index 2206926ba289..1aea92363fd3 100644
> --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_doorbell_mgr.c
> @@ -143,25 +143,21 @@ int amdgpu_device_doorbell_init(struct amdgpu_device *adev)
> adev->doorbell.base = pci_resource_start(adev->pdev, 2);
> adev->doorbell.size = pci_resource_len(adev->pdev, 2);
>
> - if (adev->enable_mes) {
> - adev->doorbell.num_kernel_doorbells =
> - adev->doorbell.size / sizeof(u32);
> - } else {
> - adev->doorbell.num_kernel_doorbells =
> - min_t(u32, adev->doorbell.size / sizeof(u32),
> - adev->doorbell_index.max_assignment+1);
> - if (adev->doorbell.num_kernel_doorbells == 0)
> - return -EINVAL;
> -
> - /* For Vega, reserve and map two pages on doorbell BAR since SDMA
> - * paging queue doorbell use the second page. The
> - * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> - * doorbells are in the first page. So with paging queue enabled,
> - * the max num_kernel_doorbells should + 1 page (0x400 in dword)
> - */
> - if (adev->asic_type >= CHIP_VEGA10)
> - adev->doorbell.num_kernel_doorbells += 0x400;
> - }
> + adev->doorbell.num_kernel_doorbells =
> + min_t(u32, adev->doorbell.size / sizeof(u32),
> + adev->doorbell_index.max_assignment+1);
> + if (adev->doorbell.num_kernel_doorbells == 0)
> + return -EINVAL;
> +
> + /*
> + * For Vega, reserve and map two pages on doorbell BAR since SDMA
> + * paging queue doorbell use the second page. The
> + * AMDGPU_DOORBELL64_MAX_ASSIGNMENT definition assumes all the
> + * doorbells are in the first page. So with paging queue enabled,
> + * the max num_kernel_doorbells should + 1 page (0x400 in dword)
> + */
> + if (adev->asic_type >= CHIP_VEGA10)
> + adev->doorbell.num_kernel_doorbells += 0x400;
>
> adev->doorbell.ptr = ioremap(adev->doorbell.base,
> adev->doorbell.num_kernel_doorbells *
> --
> 2.40.0
>
