On Sun, Mar 12, 2023 at 08:01:56PM +0800, Huang Rui wrote: > From: Chen Jiqian <Jiqian.Chen@xxxxxxx> > > Add acpi_register_gsi_xen_pvh() to register gsi for PVH mode. > In addition to call acpi_register_gsi_ioapic(), it also setup > a map between gsi and vector in hypervisor side. So that, > when dgpu create an interrupt, hypervisor can correctly find > which guest domain to process interrupt by vector. The term 'dgpu' needs clarifying or replacing by a more generic naming. Also, I would like to be able to get away from requiring dom0 to register the GSIs in this way. If you take a look at Xen, there's code in the emulated IO-APIC available to dom0 that already does this registering (see vioapic_hwdom_map_gsi() in Xen). I think the problem here is that the GSI used by the device you want to passthrough has never had it's pin unmasked in the IO-APIC, and hence hasn't been registered. It would be helpful if you could state in the commit message what issue you are trying to solve by doing this registering here, I assume it is done in order to map the IRQ to a PIRQ, so later calls by the toolstack to bind it succeed. Would it be possible instead to perform the call to PHYSDEVOP_map_pirq in the toolstack itself if the PIRQ cannot be found? Thanks, Roger.
