[Public] Hi all, This week this patchset was tested on the following systems: Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U Lenovo Thinkpad T13s Gen4 with AMD Ryzen 5 6600U Reference AMD RX6800 These systems were tested on the following display types: eDP, (1080p 60hz [5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U]) VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA]) DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters]) MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays HP Hook G2 with 1 and 2 4k60 Displays The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to): Changing display configurations and settings Benchmark testing Feature testing (Freesync, etc.) Automated testing includes (but is not limited to): Script testing (scripts to automate some of the manual checks) IGT testing The patchset consists of the amd-staging-drm-next branch (Head commit - c4a5cf85ab8c: drm/amdgpu: Optimize end of non-contig VA ranges) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis). Tested on Ubuntu 22.04.1 Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx> Thank you, Dan Wheeler Sr. Technologist | AMD SW Display ------------------------------------------------------------------------------------------------------------------ 1 Commerce Valley Dr E, Thornhill, ON L3T 7X6 amd.com -----Original Message----- From: Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx> Sent: March 10, 2023 4:31 AM To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx> Subject: [PATCH 00/19] DC Patches Mar 13rd, 2023 This DC patchset brings improvements in multiple areas. In summary, we highlight: - FW Release 0.0.158.0 - Fixes to HDCP, DP MST and more - Improvements on USB4 links and more - Code re-architecture on link.h Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx> Alvin Lee (1): drm/amd/display: Use DPP inst instead of pipe idx for DPP DTO programming Anthony Koo (1): drm/amd/display: [FW Promotion] Release 0.0.158.0 Aric Cyr (1): drm/amd/display: 3.2.227 Ayush Gupta (1): drm/amd/display: disconnect MPCC only on OTG change Bhawanpreet Lakha (1): drm/amd/display: Fix HDCP failing to enable after suspend Cruise Hung (1): drm/amd/display: Fix DP MST sinks removal issue Fangzhi Zuo (2): drm/amd/display: Add DSC Support for Synaptics Cascaded MST Hub drm/amd/display: Take FEC Overhead into Timeslot Calculation Mustapha Ghaddar (1): drm/amd/display: Add Validate BW for USB4 Links Robin Chen (1): drm/amd/display: hpd rx irq not working with eDP interface Saaem Rizvi (1): drm/amd/display: Remove OTG DIV register write for Virtual signals. Samson Tam (2): drm/amd/display: reallocate DET for dual displays with high pixel rate ratio drm/amd/display: fix assert condition Stylon Wang (1): drm/amd/display: Clearly states if long or short HPD event in dmesg logs Swapnil Patel (1): drm/amd/display: default values for luminance range if they are 0 Wenjing Liu (1): drm/amd/display: convert link.h functions to function pointer style Wesley Chalmers (2): drm/amd/display: Do not set DRR on pipe Commit drm/amd/display: Make DCN32 functions available to future DCNs Zhikai Zhai (1): drm/amd/display: reset the scaler boundary mode .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 22 +- .../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 2 +- .../display/amdgpu_dm/amdgpu_dm_mst_types.c | 51 ++- .../display/amdgpu_dm/amdgpu_dm_mst_types.h | 15 + .../gpu/drm/amd/display/dc/clk_mgr/clk_mgr.c | 4 +- .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 38 ++- .../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.h | 3 + drivers/gpu/drm/amd/display/dc/core/dc.c | 33 +- .../drm/amd/display/dc/core/dc_link_enc_cfg.c | 2 +- .../drm/amd/display/dc/core/dc_link_exports.c | 34 +- .../gpu/drm/amd/display/dc/core/dc_resource.c | 13 +- drivers/gpu/drm/amd/display/dc/dc.h | 15 +- drivers/gpu/drm/amd/display/dc/dc_types.h | 7 + .../display/dc/dce110/dce110_hw_sequencer.c | 60 ++-- .../gpu/drm/amd/display/dc/dcn10/dcn10_dpp.h | 4 + .../drm/amd/display/dc/dcn10/dcn10_dpp_dscl.c | 4 + .../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 6 +- .../display/dc/dcn10/dcn10_stream_encoder.c | 7 +- .../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 14 +- .../drm/amd/display/dc/dcn20/dcn20_resource.c | 9 +- .../display/dc/dcn20/dcn20_stream_encoder.c | 3 +- .../drm/amd/display/dc/dcn21/dcn21_hwseq.c | 4 +- .../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.h | 2 + .../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 5 +- .../drm/amd/display/dc/dcn30/dcn30_resource.c | 9 +- .../amd/display/dc/dcn302/dcn302_resource.c | 9 +- .../amd/display/dc/dcn303/dcn303_resource.c | 9 +- .../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 10 +- .../dc/dcn314/dcn314_dio_stream_encoder.c | 2 +- .../drm/amd/display/dc/dcn314/dcn314_hwseq.c | 2 +- .../dc/dcn32/dcn32_dio_stream_encoder.c | 2 +- .../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 15 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.c | 8 +- .../gpu/drm/amd/display/dc/dcn32/dcn32_mpc.h | 13 + .../drm/amd/display/dc/dcn32/dcn32_resource.c | 15 +- .../display/dc/dcn32/dcn32_resource_helpers.c | 43 ++- .../amd/display/dc/dcn321/dcn321_resource.c | 9 +- .../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 4 +- .../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 2 +- drivers/gpu/drm/amd/display/dc/dsc/dc_dsc.c | 53 +++ drivers/gpu/drm/amd/display/dc/inc/link.h | 314 ++++++++++------- .../display/dc/link/accessories/link_dp_cts.c | 1 + .../dc/link/accessories/link_dp_trace.c | 8 +- .../dc/link/accessories/link_dp_trace.h | 5 + .../amd/display/dc/link/hwss/link_hwss_dio.c | 22 +- .../display/dc/link/hwss/link_hwss_hpo_dp.c | 8 +- .../drm/amd/display/dc/link/link_detection.c | 10 +- .../drm/amd/display/dc/link/link_detection.h | 9 +- .../gpu/drm/amd/display/dc/link/link_dpms.c | 43 +-- .../gpu/drm/amd/display/dc/link/link_dpms.h | 23 +- .../drm/amd/display/dc/link/link_factory.c | 322 ++++++++++++++---- .../drm/amd/display/dc/link/link_factory.h | 2 + .../drm/amd/display/dc/link/link_resource.h | 4 + .../drm/amd/display/dc/link/link_validation.c | 5 +- .../drm/amd/display/dc/link/link_validation.h | 7 + .../amd/display/dc/link/protocols/link_ddc.h | 28 ++ .../dc/link/protocols/link_dp_capability.c | 10 +- .../dc/link/protocols/link_dp_capability.h | 9 + .../dc/link/protocols/link_dp_dpia_bw.c | 34 ++ .../dc/link/protocols/link_dp_dpia_bw.h | 14 + .../display/dc/link/protocols/link_dp_phy.h | 5 + .../dc/link/protocols/link_dp_training.c | 6 +- .../link/protocols/link_edp_panel_control.c | 20 +- .../link/protocols/link_edp_panel_control.h | 10 + .../amd/display/dc/link/protocols/link_hpd.h | 3 + .../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 4 +- 66 files changed, 1067 insertions(+), 421 deletions(-) -- 2.34.1