Re: [PATCH v2 3/8] drm/amdgpu: rename gmc.aper_base/size

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Am 14.02.23 um 17:15 schrieb Shashank Sharma:

From: Alex Deucher <alexander.deucher@xxxxxxx>

This patch renames aper_base and aper_size parameters (in adev->gmc),
to vram_aper_base and vram_aper_size, to differentiate it from the
doorbell BAR.

V2: rebase

Cc: Alex Deucher <alexander.deucher@xxxxxxx>
Cc: Christian Koenig <christian.koenig@xxxxxxx>

Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>


Acked-by: Christian König <christian.koenig@xxxxxxx>


---
  drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c   |  2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_device.c   |  6 +++---
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c      |  2 +-
  drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h      |  4 ++--
  drivers/gpu/drm/amd/amdgpu/amdgpu_object.c   | 12 ++++++------
  drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c      |  8 ++++----
  drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c |  2 +-
  drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c       | 10 +++++-----
  drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c       | 10 +++++-----
  drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c        |  6 +++---
  drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c        | 12 ++++++------
  drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c        | 10 +++++-----
  drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c        | 10 +++++-----
  drivers/gpu/drm/amd/amdkfd/kfd_migrate.c     |  4 ++--
  14 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index f99d4873bf22..58689b2a2d1c 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -438,7 +438,7 @@ void amdgpu_amdkfd_get_local_mem_info(struct amdgpu_device *adev,
  	mem_info->vram_width = adev->gmc.vram_width;
pr_debug("Address base: %pap public 0x%llx private 0x%llx\n", 
-			&adev->gmc.aper_base,
+			&adev->gmc.vram_aper_base,
  			mem_info->local_mem_size_public,
  			mem_info->local_mem_size_private);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c 
index 0b6a394e109b..45588b7919fe 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -3961,7 +3961,7 @@ static void amdgpu_device_unmap_mmio(struct amdgpu_device *adev)
  	/* Memory manager related */
  	if (!adev->gmc.xgmi.connected_to_cpu) {
  		arch_phys_wc_del(adev->gmc.vram_mtrr);
-		arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
+		arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
  	}
  }
@@ -5562,14 +5562,14 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev, 
  	uint64_t address_mask = peer_adev->dev->dma_mask ?
  		~*peer_adev->dev->dma_mask : ~((1ULL << 32) - 1);
  	resource_size_t aper_limit =
-		adev->gmc.aper_base + adev->gmc.aper_size - 1;
+		adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
  	bool p2p_access =
  		!adev->gmc.xgmi.connected_to_cpu &&
  		!(pci_p2pdma_distance(adev->pdev, peer_adev->dev, false) < 0);
return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size && 
  		adev->gmc.real_vram_size == adev->gmc.visible_vram_size &&
-		!(adev->gmc.aper_base & address_mask ||
+		!(adev->gmc.vram_aper_base & address_mask ||
  		  aper_limit & address_mask));
  #else
  	return false;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
index 02a4c93673ce..c7e64e234de6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.c
@@ -775,7 +775,7 @@ uint64_t amdgpu_gmc_vram_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
   */
  uint64_t amdgpu_gmc_vram_cpu_pa(struct amdgpu_device *adev, struct amdgpu_bo *bo)
  {
-	return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.aper_base;
+	return amdgpu_bo_gpu_offset(bo) - adev->gmc.vram_start + adev->gmc.vram_aper_base;
  }
int amdgpu_gmc_vram_checking(struct amdgpu_device *adev) 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 0305b660cd17..bb7076ecbf01 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -167,8 +167,8 @@ struct amdgpu_gmc {
  	 * gart/vram_start/end field as the later is from
  	 * GPU's view and aper_base is from CPU's view.
  	 */
-	resource_size_t		aper_size;
-	resource_size_t		aper_base;
+	resource_size_t		vram_aper_size;
+	resource_size_t		vram_aper_base;
  	/* for some chips with <= 32MB we need to lie
  	 * about vram size near mc fb location */
  	u64			mc_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
index 25a68d8888e0..b48c9fd60c43 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c
@@ -1046,8 +1046,8 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
  	/* On A+A platform, VRAM can be mapped as WB */
  	if (!adev->gmc.xgmi.connected_to_cpu) {
  		/* reserve PAT memory space to WC for VRAM */
-		int r = arch_io_reserve_memtype_wc(adev->gmc.aper_base,
-				adev->gmc.aper_size);
+		int r = arch_io_reserve_memtype_wc(adev->gmc.vram_aper_base,
+				adev->gmc.vram_aper_size);
if (r) { 
  			DRM_ERROR("Unable to set WC memtype for the aperture base\n");
@@ -1055,13 +1055,13 @@ int amdgpu_bo_init(struct amdgpu_device *adev)
  		}
/* Add an MTRR for the VRAM */ 
-		adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,
-				adev->gmc.aper_size);
+		adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.vram_aper_base,
+				adev->gmc.vram_aper_size);
  	}
DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n", 
  		 adev->gmc.mc_vram_size >> 20,
-		 (unsigned long long)adev->gmc.aper_size >> 20);
+		 (unsigned long long)adev->gmc.vram_aper_size >> 20);
  	DRM_INFO("RAM width %dbits %s\n",
  		 adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]);
  	return amdgpu_ttm_init(adev);
@@ -1083,7 +1083,7 @@ void amdgpu_bo_fini(struct amdgpu_device *adev)
if (!adev->gmc.xgmi.connected_to_cpu) { 
  			arch_phys_wc_del(adev->gmc.vram_mtrr);
-			arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
+			arch_io_free_memtype_wc(adev->gmc.vram_aper_base, adev->gmc.vram_aper_size);
  		}
  		drm_dev_exit(idx);
  	}
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 73b831b47892..0e8f580769ab 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -583,7 +583,7 @@ static int amdgpu_ttm_io_mem_reserve(struct ttm_device *bdev,
  			mem->bus.addr = (u8 *)adev->mman.vram_aper_base_kaddr +
  					mem->bus.offset;
- mem->bus.offset += adev->gmc.aper_base; 
+		mem->bus.offset += adev->gmc.vram_aper_base;
  		mem->bus.is_iomem = true;
  		break;
  	default:
@@ -600,7 +600,7 @@ static unsigned long amdgpu_ttm_io_mem_pfn(struct ttm_buffer_object *bo,
amdgpu_res_first(bo->resource, (u64)page_offset << PAGE_SHIFT, 0, 
  			 &cursor);
-	return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT;
+	return (adev->gmc.vram_aper_base + cursor.start) >> PAGE_SHIFT;
  }
/** 
@@ -1752,12 +1752,12 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
  #ifdef CONFIG_64BIT
  #ifdef CONFIG_X86
  	if (adev->gmc.xgmi.connected_to_cpu)
-		adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.aper_base,
+		adev->mman.vram_aper_base_kaddr = ioremap_cache(adev->gmc.vram_aper_base,
  				adev->gmc.visible_vram_size);
else 
  #endif
-		adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.aper_base,
+		adev->mman.vram_aper_base_kaddr = ioremap_wc(adev->gmc.vram_aper_base,
  				adev->gmc.visible_vram_size);
  #endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c 
index 9fa1d814508a..d66caad04c24 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vram_mgr.c
@@ -649,7 +649,7 @@ int amdgpu_vram_mgr_alloc_sgt(struct amdgpu_device *adev,
  	 */
  	amdgpu_res_first(res, offset, length, &cursor);
  	for_each_sgtable_sg((*sgt), sg, i) {
-		phys_addr_t phys = cursor.start + adev->gmc.aper_base;
+		phys_addr_t phys = cursor.start + adev->gmc.vram_aper_base;
  		size_t size = cursor.size;
  		dma_addr_t addr;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c 
index 21e46817d82d..b2e4f4f06bdb 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -825,18 +825,18 @@ static int gmc_v10_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64 
  	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
-		adev->gmc.aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
-		adev->gmc.aper_size = adev->gmc.real_vram_size;
+		adev->gmc.vram_aper_base = adev->gfxhub.funcs->get_mc_fb_offset(adev);
+		adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
  	}
  #endif
/* In case the PCI BAR is larger than the actual amount of vram */ 
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
  	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
  		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c 
index 4326078689cd..f993ce264c3f 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
@@ -692,17 +692,17 @@ static int gmc_v11_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64 
  	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
-		adev->gmc.aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
-		adev->gmc.aper_size = adev->gmc.real_vram_size;
+		adev->gmc.vram_aper_base = adev->mmhub.funcs->get_mc_fb_offset(adev);
+		adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
  	}
  #endif
  	/* In case the PCI BAR is larger than the actual amount of vram */
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
  	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
  		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c 
index ec291d28edff..cd159309e9e5 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v6_0.c
@@ -324,9 +324,9 @@ static int gmc_v6_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
/* set the gart size */ 
  	if (amdgpu_gart_size == -1) {
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
index 979da6f510e8..8ee9731a0c8c 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v7_0.c
@@ -377,20 +377,20 @@ static int gmc_v7_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64 
  	if ((adev->flags & AMD_IS_APU) &&
-	    adev->gmc.real_vram_size > adev->gmc.aper_size &&
+	    adev->gmc.real_vram_size > adev->gmc.vram_aper_size &&
  	    !amdgpu_passthrough(adev)) {
-		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
-		adev->gmc.aper_size = adev->gmc.real_vram_size;
+		adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
+		adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
  	}
  #endif
/* In case the PCI BAR is larger than the actual amount of vram */ 
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
  	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
  		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c 
index 382dde1ce74c..259d797358f1 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c
@@ -577,18 +577,18 @@ static int gmc_v8_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64 
  	if ((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) {
-		adev->gmc.aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
-		adev->gmc.aper_size = adev->gmc.real_vram_size;
+		adev->gmc.vram_aper_base = ((u64)RREG32(mmMC_VM_FB_OFFSET)) << 22;
+		adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
  	}
  #endif
/* In case the PCI BAR is larger than the actual amount of vram */ 
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
  	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
  		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c 
index 08d6cf79fb15..a7074995d97e 100644
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1509,8 +1509,8 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
  		if (r)
  			return r;
  	}
-	adev->gmc.aper_base = pci_resource_start(adev->pdev, 0);
-	adev->gmc.aper_size = pci_resource_len(adev->pdev, 0);
+	adev->gmc.vram_aper_base = pci_resource_start(adev->pdev, 0);
+	adev->gmc.vram_aper_size = pci_resource_len(adev->pdev, 0);
#ifdef CONFIG_X86_64 
  	/*
@@ -1528,16 +1528,16 @@ static int gmc_v9_0_mc_init(struct amdgpu_device *adev)
  	if (((adev->flags & AMD_IS_APU) && !amdgpu_passthrough(adev)) ||
  	    (adev->gmc.xgmi.supported &&
  	     adev->gmc.xgmi.connected_to_cpu)) {
-		adev->gmc.aper_base =
+		adev->gmc.vram_aper_base =
  			adev->gfxhub.funcs->get_mc_fb_offset(adev) +
  			adev->gmc.xgmi.physical_node_id *
  			adev->gmc.xgmi.node_segment_size;
-		adev->gmc.aper_size = adev->gmc.real_vram_size;
+		adev->gmc.vram_aper_size = adev->gmc.real_vram_size;
  	}
#endif 
  	/* In case the PCI BAR is larger than the actual amount of vram */
-	adev->gmc.visible_vram_size = adev->gmc.aper_size;
+	adev->gmc.visible_vram_size = adev->gmc.vram_aper_size;
  	if (adev->gmc.visible_vram_size > adev->gmc.real_vram_size)
  		adev->gmc.visible_vram_size = adev->gmc.real_vram_size;
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c 
index 10048ce16aea..c86c6705b470 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_migrate.c
@@ -1002,8 +1002,8 @@ int svm_migrate_init(struct amdgpu_device *adev)
  	 */
  	size = ALIGN(adev->gmc.real_vram_size, 2ULL << 20);
  	if (adev->gmc.xgmi.connected_to_cpu) {
-		pgmap->range.start = adev->gmc.aper_base;
-		pgmap->range.end = adev->gmc.aper_base + adev->gmc.aper_size - 1;
+		pgmap->range.start = adev->gmc.vram_aper_base;
+		pgmap->range.end = adev->gmc.vram_aper_base + adev->gmc.vram_aper_size - 1;
  		pgmap->type = MEMORY_DEVICE_COHERENT;
  	} else {
  		res = devm_request_free_mem_region(adev->dev, &iomem_resource, size);
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