From: Hans de Goede
> Sent: 10 February 2023 19:33
>
> Hi,
>
> On 2/10/23 20:09, Hans de Goede wrote:
> > Hi,
> >
> > On 2/10/23 05:48, Orlando Chamberlain wrote:
> >> Currently it manually flips the byte order, but we can instead use
> >> cpu_to_be32(val) for this.
> >>
> >> Signed-off-by: Orlando Chamberlain <orlandoch.dev@xxxxxxxxx>
> >> ---
> >> drivers/platform/x86/apple-gmux.c | 18 ++----------------
> >> 1 file changed, 2 insertions(+), 16 deletions(-)
> >>
> >> diff --git a/drivers/platform/x86/apple-gmux.c b/drivers/platform/x86/apple-gmux.c
> >> index 9333f82cfa8a..e8cb084cb81f 100644
> >> --- a/drivers/platform/x86/apple-gmux.c
> >> +++ b/drivers/platform/x86/apple-gmux.c
> >> @@ -94,13 +94,7 @@ static u32 gmux_pio_read32(struct apple_gmux_data *gmux_data, int port)
> >> static void gmux_pio_write32(struct apple_gmux_data *gmux_data, int port,
> >> u32 val)
> >> {
> >> - int i;
> >> - u8 tmpval;
> >> -
> >> - for (i = 0; i < 4; i++) {
> >> - tmpval = (val >> (i * 8)) & 0xff;
> >> - outb(tmpval, gmux_data->iostart + port + i);
> >> - }
> >> + outl(cpu_to_be32(val), gmux_data->iostart + port);
> >> }
> >>
> >> static int gmux_index_wait_ready(struct apple_gmux_data *gmux_data)
> >
> > The ioport / indexed-ioport accessed apple_gmux-es likely are (part of?)
> > LPC bus devices . Looking at the bus level you are now changing 4 io
> > accesses with a size of 1 byte, to 1 32 bit io-access.
>
> Correction to myself, re-reading the LPC specification, then
> if I'm right and this is a LPC device then all IO in/out accesses
> are always 1 byte accesses. Since the LPC bus only supports 16 / 32
> bit accesses for DMA cycles.
>
> So presumably the outl() would get split into 4 separate 8 bit
> (port) IO accesses.
I wonder if there is something obscure and the order of the
4 bytes writes matters?
In any case writing as:
xxxx iostart = gmux_data->iostart + port;
outb(val, iostart);
outb(val >> 8, iostart + 1);
outb(val >> 16, iostart + 2);
outb(val >> 24, ioctart + 3);
almost certainly generates better code.
David
-
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