From: Shashank Sharma <contactshashanksharma@xxxxxxxxx>
This patch initializes doorbell pool with bar manager, which will
divide all the doorbell memory into pages.
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
Signed-off-by: Shashank Sharma <shashank.sharma@xxxxxxx>
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 71eff2f195a7..08355f981313 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1793,6 +1793,13 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
if (r)
return r;
+ /* Initialize DOORBELL pool with all of DOORBELL divided into pages */
+ r = amdgpu_bar_mgr_init(adev, AMDGPU_PL_DOORBELL);
+ if (r) {
+ DRM_ERROR("Failed initializing DOORBELL heap.\n");
+ return r;
+ }
+
/*
* only NAVI10 and onwards ASIC support for IP discovery.
* If IP discovery enabled, a block of memory should be
@@ -1829,6 +1836,9 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
(unsigned) (adev->gmc.real_vram_size / (1024 * 1024)));
+ DRM_INFO("amdgpu: %uM of DOORBELL memory ready\n",
+ (unsigned) (adev->gmc.doorbell_aper_size / (1024 * 1024)));
+
/* Compute GTT size, either based on 1/2 the size of RAM size
* or whatever the user passed on module init */
if (amdgpu_gtt_size == -1) {
@@ -1927,6 +1937,7 @@ void amdgpu_ttm_fini(struct amdgpu_device *adev)
}
amdgpu_bar_mgr_fini(adev, TTM_PL_VRAM);
+ amdgpu_bar_mgr_fini(adev, AMDGPU_PL_DOORBELL);
amdgpu_gtt_mgr_fini(adev);
amdgpu_preempt_mgr_fini(adev);
ttm_range_man_fini(&adev->mman.bdev, AMDGPU_PL_GDS);
--
2.34.1
