[Public]
Hi all,
This week this patchset was tested on the following systems:
Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U
Lenovo Thinkpad T13s Gen4 with AMD Ryzen 5 6600U
Reference AMD RX6800
These systems were tested on the following display types:
eDP, (1080p 60hz [4500U, 5650U]) (1920x1200 60hz [6600U]) (2560x1600 120hz[6600U])
VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA])
DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters])
MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays
DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays
HP Hook G2 with 1 and 2 4k60 Displays
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
Changing display configurations and settings
Benchmark testing
Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
Script testing (scripts to automate some of the manual checks)
IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 004cf26320ba drm/amd/display: 3.2.217) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis).
Tested on Ubuntu 22.04.1 and Chrome OS
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
------------------------------------------------------------------------------------------------------------------
1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>
Sent: January 10, 2023 11:55 AM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Zuo, Jerry <Jerry.Zuo@xxxxxxx>; Mahfooz, Hamza <Hamza.Mahfooz@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/37] DC Patches Jan 10, 2023
This DC patchset brings improvements in multiple areas. In summary, we highlight the following areas:
- Revert patches that caused regressions associated with audio and an
old change that checks the DCN version.
- Refactor DDC and HDP.
- Move DPIA and DPCD logic to new files.
- Updates to DMUB.
- Optimization and bug fixes for SUBVP/DRR.
- Drop legacy code.
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thanks
Siqueira
Alvin Lee (2):
drm/amd/display: Request min clocks after disabling pipes on init
drm/amd/display: Allow subvp on vactive pipes that are 2560x1440@60
Aric Cyr (1):
drm/amd/display: 3.2.218
Aurabindo Pillai (2):
Revert "drm/amd/display: Demote Error Level When ODM Transition
Supported"
drm/amd/display: fix an error check condition for synced pipes
Bhawanpreet Lakha (1):
drm/amd/display: Change i2c speed for hdcp
Brandon Syu (1):
drm/amd/display: fix mapping to non-allocated address
Charlene Liu (2):
drm/amd/display: add hubbub_init related
drm/amd/display: contional remove disable dig_fifo when blank
Cruise Hung (1):
drm/amd/display: Fix DPIA link encoder assignment issue
Dillon Varone (9):
drm/amd/display: Implement FIFO enable sequence on DCN32
drm/amd/display: Optimize subvp and drr validation
drm/amd/display: Account for DCC Meta pitch in DML MALL surface
calculations
drm/amd/display: Account for Subvp Phantoms in DML MALL surface
calculations
drm/amd/display: Use DML for MALL SS and Subvp allocation calculations
drm/amd/display: cleanup function args in dml
drm/amd/display: set active bit for desktop with VSDBv3
drm/amd/display: Remove DISPCLK dentist programming for dcn32
drm/amd/display: Account for MPO planes in dcn32 mall alloc
calculations
Dmytro Laktyushkin (1):
drm/amd/display: fix multi edp panel instancing
Martin Leung (1):
Revert "drm/amd/display: Speed up DML fast_validate path"
Mustapha Ghaddar (2):
drm/amd/display: Update BW alloc after new DMUB logic
drm/amd/display: Update dmub header to match DMUB
Rodrigo Siqueira (1):
drm/amd/display: Remove unused code
Saaem Rizvi (2):
drm/amd/display: Remove SubVp support if src/dst rect does not equal
stream timing
drm/amd/display: Add extra mblk for DCC
Tony Tascioglu (2):
drm/amd/display: Optimize link power-down when link powered externally
drm/amd/display: Skip backlight control delay on external powered
links
Wenjing Liu (7):
drm/amd/display: refactor hpd logic from dc_link to link_hpd
drm/amd/display: refactor ddc logic from dc_link_ddc to link_ddc
drm/amd/display: move dpcd logic from dc_link_dpcd to link_dpcd
drm/amd/display: move dc_link_dpia logic to link_dp_dpia
drm/amd/display: move dp link training logic to link_dp_training
drm/amd/display: move dp phy related logic to link_dp_phy
drm/amd/display: move dp capability related logic to
link_dp_capability
hersen wu (2):
drm/amd/display: phase2 enable mst hdcp multiple displays
drm/amd/display: hdcp not enabled on connector 0
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 1 -
.../amd/display/amdgpu_dm/amdgpu_dm_debugfs.c | 3 +-
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.c | 153 +-
.../amd/display/amdgpu_dm/amdgpu_dm_hdcp.h | 5 +-
.../display/amdgpu_dm/amdgpu_dm_mst_types.c | 2 -
drivers/gpu/drm/amd/display/dc/Makefile | 6 +-
.../gpu/drm/amd/display/dc/bios/bios_parser.c | 1 -
.../drm/amd/display/dc/bios/bios_parser2.c | 6 +-
.../drm/amd/display/dc/bios/command_table2.c | 14 +-
.../drm/amd/display/dc/bios/command_table2.h | 3 +-
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 97 +-
drivers/gpu/drm/amd/display/dc/core/dc.c | 5 +-
drivers/gpu/drm/amd/display/dc/core/dc_link.c | 542 +- .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 6682 ++---------------
.../drm/amd/display/dc/core/dc_link_enc_cfg.c | 60 +-
.../gpu/drm/amd/display/dc/core/dc_resource.c | 35 +-
drivers/gpu/drm/amd/display/dc/dc.h | 3 +-
.../gpu/drm/amd/display/dc/dc_bios_types.h | 3 +-
drivers/gpu/drm/amd/display/dc/dc_ddc_types.h | 28 +
drivers/gpu/drm/amd/display/dc/dc_dp_types.h | 3 +
.../gpu/drm/amd/display/dc/dc_hdmi_types.h | 114 +
drivers/gpu/drm/amd/display/dc/dc_link.h | 69 +-
drivers/gpu/drm/amd/display/dc/dc_types.h | 1 +
drivers/gpu/drm/amd/display/dc/dce/dce_aux.h | 2 +-
.../drm/amd/display/dc/dce/dce_link_encoder.c | 1 -
.../display/dc/dce110/dce110_hw_sequencer.c | 41 +-
.../display/dc/dce110/dce110_hw_sequencer.h | 2 +-
.../drm/amd/display/dc/dcn10/dcn10_hubbub.h | 12 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 4 +-
.../amd/display/dc/dcn10/dcn10_link_encoder.c | 1 -
.../display/dc/dcn10/dcn10_stream_encoder.c | 2 +-
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 10 +-
.../amd/display/dc/dcn20/dcn20_link_encoder.c | 1 -
.../drm/amd/display/dc/dcn20/dcn20_resource.c | 6 +-
.../display/dc/dcn20/dcn20_stream_encoder.c | 2 +-
.../display/dc/dcn201/dcn201_link_encoder.c | 1 -
.../amd/display/dc/dcn21/dcn21_link_encoder.c | 1 -
.../display/dc/dcn30/dcn30_dio_link_encoder.c | 1 -
.../drm/amd/display/dc/dcn30/dcn30_hwseq.c | 1 -
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 6 +-
.../dc/dcn301/dcn301_dio_link_encoder.c | 1 -
.../amd/display/dc/dcn302/dcn302_resource.c | 16 +
.../amd/display/dc/dcn303/dcn303_resource.c | 6 +-
.../display/dc/dcn31/dcn31_dio_link_encoder.c | 1 -
.../drm/amd/display/dc/dcn31/dcn31_hubbub.c | 18 +
.../drm/amd/display/dc/dcn31/dcn31_hubbub.h | 10 +-
.../drm/amd/display/dc/dcn31/dcn31_hwseq.c | 9 +-
.../dc/dcn314/dcn314_dio_stream_encoder.c | 5 +-
.../drm/amd/display/dc/dcn314/dcn314_hwseq.c | 4 +-
.../amd/display/dc/dcn316/dcn316_resource.c | 2 +-
.../display/dc/dcn32/dcn32_dio_link_encoder.c | 1 -
.../dc/dcn32/dcn32_dio_stream_encoder.c | 30 +-
.../drm/amd/display/dc/dcn32/dcn32_hubbub.c | 29 +
.../drm/amd/display/dc/dcn32/dcn32_hubbub.h | 17 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_hubp.c | 6 +-
.../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 176 +-
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 6 +-
.../drm/amd/display/dc/dcn32/dcn32_resource.h | 15 +-
.../display/dc/dcn32/dcn32_resource_helpers.c | 183 +-
.../dc/dcn321/dcn321_dio_link_encoder.c | 1 -
.../amd/display/dc/dcn321/dcn321_resource.c | 6 +-
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 5 +-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 108 +-
.../dc/dml/dcn32/display_mode_vba_32.c | 43 +-
.../dc/dml/dcn32/display_mode_vba_util_32.c | 33 +-
.../dc/dml/dcn32/display_mode_vba_util_32.h | 5 +-
.../drm/amd/display/dc/dml/display_mode_lib.h | 1 -
.../drm/amd/display/dc/dml/display_mode_vba.c | 1 +
.../drm/amd/display/dc/dml/display_mode_vba.h | 1 +
.../display/dc/gpio/dcn20/hw_factory_dcn20.c | 6 +-
.../display/dc/gpio/dcn30/hw_factory_dcn30.c | 6 +-
.../display/dc/gpio/dcn32/hw_factory_dcn32.c | 6 +-
.../gpu/drm/amd/display/dc/gpio/ddc_regs.h | 7 +
.../gpu/drm/amd/display/dc/hdcp/hdcp_msg.c | 5 +-
.../gpu/drm/amd/display/dc/inc/core_types.h | 6 +-
.../gpu/drm/amd/display/dc/inc/dc_link_ddc.h | 133 -
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 160 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dpia.h | 105 -
.../drm/amd/display/dc/inc/hw/aux_engine.h | 8 +-
.../gpu/drm/amd/display/dc/inc/hw/dchubbub.h | 1 +
drivers/gpu/drm/amd/display/dc/inc/link.h | 92 +
drivers/gpu/drm/amd/display/dc/link/Makefile | 6 +-
.../{core/dc_link_ddc.c => link/link_ddc.c} | 409 +-
.../i2caux_interface.h => dc/link/link_ddc.h} | 70 +-
.../amd/display/dc/link/link_dp_capability.c | 2169 ++++++
.../amd/display/dc/link/link_dp_capability.h | 66 +
.../drm/amd/display/dc/link/link_dp_dpia.c | 107 +
.../drm/amd/display/dc/link/link_dp_dpia.h | 43 +
.../drm/amd/display/dc/link/link_dp_dpia_bw.h | 47 +-
.../gpu/drm/amd/display/dc/link/link_dp_phy.c | 145 +
.../gpu/drm/amd/display/dc/link/link_dp_phy.h | 51 +
.../amd/display/dc/link/link_dp_training.c | 1700 +++++
.../amd/display/dc/link/link_dp_training.h | 179 +
.../dc/link/link_dp_training_128b_132b.c | 260 +
.../dc/link/link_dp_training_128b_132b.h | 42 +
.../display/dc/link/link_dp_training_8b_10b.c | 415 +
.../display/dc/link/link_dp_training_8b_10b.h | 61 +
.../dc/link/link_dp_training_auxless.c | 80 +
.../dc/link/link_dp_training_auxless.h | 35 +
.../link_dp_training_dpia.c} | 308 +-
.../display/dc/link/link_dp_training_dpia.h | 41 +
.../link_dp_training_fixed_vs_pe_retimer.c | 580 ++
.../link_dp_training_fixed_vs_pe_retimer.h | 45 +
.../{core/dc_link_dpcd.c => link/link_dpcd.c} | 13 +-
.../amd/display/dc/{inc => link}/link_dpcd.h | 5 +-
.../gpu/drm/amd/display/dc/link/link_hpd.c | 240 +
.../gpu/drm/amd/display/dc/link/link_hpd.h | 47 +
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 16 +-
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 168 +-
.../drm/amd/display/dmub/src/dmub_srv_stat.c | 22 +-
.../amd/display/include/ddc_service_types.h | 5 +
.../amd/display/modules/freesync/freesync.c | 64 +-
112 files changed, 8789 insertions(+), 7854 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/dc_hdmi_types.h
delete mode 100644 drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h
delete mode 100644 drivers/gpu/drm/amd/display/dc/inc/dc_link_dpia.h
create mode 100644 drivers/gpu/drm/amd/display/dc/inc/link.h
rename drivers/gpu/drm/amd/display/dc/{core/dc_link_ddc.c => link/link_ddc.c} (57%) rename drivers/gpu/drm/amd/display/{include/i2caux_interface.h => dc/link/link_ddc.h} (52%) create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_capability.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_capability.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_dpia.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_dpia.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_phy.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_phy.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_128b_132b.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_128b_132b.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_8b_10b.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_8b_10b.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_auxless.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_auxless.h
rename drivers/gpu/drm/amd/display/dc/{core/dc_link_dpia.c => link/link_dp_training_dpia.c} (83%) create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_dpia.h
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_fixed_vs_pe_retimer.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_training_fixed_vs_pe_retimer.h
rename drivers/gpu/drm/amd/display/dc/{core/dc_link_dpcd.c => link/link_dpcd.c} (97%) rename drivers/gpu/drm/amd/display/dc/{inc => link}/link_dpcd.h (95%) create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_hpd.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_hpd.h
--
2.39.0
