This DC patchset brings improvements in multiple areas. In summary, we highlight:
*Add configuration 2 for ABM 2.3/2.4.
*Add margin for HUBP for SubVp + DRR.
*Fix no display after resume from WB/CB.
*Limit HW cursor size to be less than 64 x 64 bytes when the stream is >= 4K.
*Lower watermarks for enter/enter+exit latency.
*Update support types for DCN314 to include z8 only and z8_z10 only state.
*Add new value for soc bounding box and dummy pstate.
*Override fclk chang latency when calculating prefetch schedule for subvp with low uclk.
*Add check for DET fetch latency for dcn32.
*Add check if PSR enabled when entering MALL.
*Use base MALL allocation size calculations off vewport height.
*Add YCBCR2020 to CSC matrix.
*Implement DP-Tx portion to interact with DPIA.
*Add debug option for increasing phantom lines.
*Fix phantom plane/stream retain after fail validation.
*Fix display corruption with VSR enable.
*Set valid divider value for virtual and FRL/DP2.
*Add new num clk levels struct for max mclk index.
*Fix check for phantom BPP.
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Alvin Lee (5):
drm/amd/display: Limit HW cursor size of >= 4k
drm/amd/display: Check if PSR enabled when entering MALL
drm/amd/display: Add debug options for increasing phantom lines
drm/amd/display: Retain phantom plane/stream if validation fails
drm/amd/display: Revert check for phantom BPP
Aric Cyr (1):
SWDEV-1 - dc: 3.2.213
Camille Cho (1):
drm/amd/display: new ABM config 2
David Galiffi (1):
drm/amd/display: Fix rotated cursor offset calculation
Dillon Varone (5):
drm/amd/display: Update soc bounding box for dcn32/dcn321
drm/amd/display: Use dummy pstate latency for subvp when needed on
dcn32
drm/amd/display: Add check for DET fetch latency hiding for dcn32
drm/amd/display: Use viewport height for subvp mall allocation size
drm/amd/display: Use new num clk levels struct for max mclk index
Ilya Bakoulin (1):
drm/amd/display: Fix display corruption w/ VSR enable
Lee, Alvin (1):
drm/amd/display: Add margin on DRR vblank start for subvp
Mustapha Ghaddar (1):
drm/amd/display: Phase 1 Add Bw Allocation source and header files
Nicholas Kazlauskas (2):
drm/amd/display: Update Z8 watermarks for DCN314
drm/amd/display: Add Z8 allow states to z-state support list
Rodrigo Siqueira (1):
drm/amd/display: Add YCBCR2020 coefficients to CSC matrix
Taimur Hassan (1):
drm/amd/display: Avoid setting pixel rate divider to N/A
Tsung-hua Lin (2):
drm/amd/display: No display after resume from WB/CB
drm/amd/display: No display after resume from WB/CB[modify]
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 37 ++++++++++
.../amd/display/dc/clk_mgr/dcn31/dcn31_smu.c | 4 +-
.../display/dc/clk_mgr/dcn314/dcn314_smu.c | 12 +++-
drivers/gpu/drm/amd/display/dc/core/dc.c | 31 +++++++-
.../gpu/drm/amd/display/dc/core/dc_stream.c | 16 ++++-
drivers/gpu/drm/amd/display/dc/dc.h | 6 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 1 +
drivers/gpu/drm/amd/display/dc/dc_link.h | 14 ++++
drivers/gpu/drm/amd/display/dc/dc_stream.h | 2 +-
.../display/dc/dce110/dce110_hw_sequencer.c | 9 ++-
.../gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 34 ++++++---
.../gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c | 28 +++++---
.../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 32 ++++++---
.../drm/amd/display/dc/dcn314/dcn314_dccg.c | 7 ++
.../drm/amd/display/dc/dcn314/dcn314_hwseq.c | 6 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 4 +-
.../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 11 +--
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 27 ++++++-
.../drm/amd/display/dc/dcn32/dcn32_resource.h | 3 +
.../display/dc/dcn32/dcn32_resource_helpers.c | 2 +-
.../amd/display/dc/dcn321/dcn321_resource.c | 4 +-
.../drm/amd/display/dc/dml/dcn20/dcn20_fpu.c | 12 +++-
.../amd/display/dc/dml/dcn314/dcn314_fpu.c | 4 +-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 72 ++++++++++++++-----
.../dc/dml/dcn32/display_mode_vba_32.c | 41 ++++++++++-
.../dc/dml/dcn32/display_mode_vba_util_32.c | 69 ++++++++++++++++++
.../dc/dml/dcn32/display_mode_vba_util_32.h | 18 +++++
.../amd/display/dc/dml/dcn321/dcn321_fpu.c | 8 +--
.../drm/amd/display/dc/dml/display_mode_vba.h | 2 +
.../gpu/drm/amd/display/dc/inc/core_types.h | 1 +
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 9 ++-
.../drm/amd/display/dc/link/link_dp_dpia_bw.c | 28 ++++++++
.../drm/amd/display/dc/link/link_dp_dpia_bw.h | 69 ++++++++++++++++++
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 3 +-
.../amd/display/modules/power/power_helpers.c | 9 +++
35 files changed, 552 insertions(+), 83 deletions(-)
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.c
create mode 100644 drivers/gpu/drm/amd/display/dc/link/link_dp_dpia_bw.h
--
2.25.1
