[Public]
Hi all,
This week this patchset was tested on the following systems:
HP Envy 360, with Ryzen 5 4500U
Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U
Sapphire Pulse RX5700XT
Reference AMD RX6800
Engineering board with Ryzen 9 5900H
These systems were tested on the following display types:
eDP, (1080p 60hz [4500U, 5650U, 5900H])
VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA])
DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters])
MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays
DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
Changing display configurations and settings
Benchmark testing
Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
Script testing (scripts to automate some of the manual checks)
IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - ) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis).
Tested on Ubuntu 22.04 and Chrome OS
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>
Sent: October 6, 2022 5:26 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/23] DC Patches October 17th, 2022
This DC patch-set brings improvements in multiple areas. In summary, we
highlight:
- PMFW z-state interface update
- Cursor update refactor
- Fixes to DSC validation, DCFCLK during Freesync, etc.
- Code cleanup
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
---
Alvin Lee (2):
drm/amd/display: Fix watermark calculation
drm/amd/display: Don't return false if no stream
Aric Cyr (1):
drm/amd/display: 3.2.207
Aurabindo Pillai (1):
drm/amd/display: Do not trigger timing sync for phantom pipes
Dillon Varone (4):
Revert "drm/amd/display: skip commit minimal transition state"
drm/amd/display: Use correct pixel clock to program DTBCLK DTO's
drm/amd/display: Acquire FCLK DPM levels on DCN32
drm/amd/display: Fix bug preventing FCLK Pstate allow message being
sent
Dmytro Laktyushkin (1):
drm/amd/display: always allow pstate change when no dpps are active on
dcn315
Fangzhi Zuo (1):
drm/amd/display: Validate DSC After Enable All New CRTCs
Josip Pavic (1):
drm/amd/display: do not compare integers of different widths
Jun Lei (1):
drm/amd/display: Add a helper to map ODM/MPC/Multi-Plane resources
Martin Leung (1):
drm/amd/display: zeromem mypipe heap struct before using it
Max Tseng (1):
drm/amd/display: Use the same cursor info across features
Meenakshikumar Somasundaram (1):
drm/amd/display: Display does not light up after S4 resume
Nicholas Kazlauskas (1):
drm/amd/display: Update PMFW z-state interface for DCN314
Rodrigo Siqueira (5):
drm/amd/display: Add a missing hook to DCN20
drm/amd/display: Clean some DCN32 macros
drm/amd/display: Use set_vtotal_min_max to configure OTG VTOTAL
drm/amd/display: Drop uncessary OTG lock check
drm/amd/display: Remove wrong pipe control lock
Vladimir Stempen (2):
drm/amd/display: properly configure DCFCLK when enable/disable
Freesync
drm/amd/display: increase hardware status wait time
.../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 13 +-
.../display/dc/clk_mgr/dcn20/dcn20_clk_mgr.c | 4 +-
.../display/dc/clk_mgr/dcn314/dcn314_smu.c | 11 +-
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 45 +++--
drivers/gpu/drm/amd/display/dc/core/dc.c | 51 +++---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 49 ++++-
.../gpu/drm/amd/display/dc/core/dc_stream.c | 4 +
drivers/gpu/drm/amd/display/dc/dc.h | 7 +-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.c | 147 ++++++++++++++-
drivers/gpu/drm/amd/display/dc/dc_dmub_srv.h | 1 +
.../gpu/drm/amd/display/dc/dcn10/dcn10_dpp.c | 1 +
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 167 +++--------------- .../gpu/drm/amd/display/dc/dcn10/dcn10_optc.c | 29 +-- .../gpu/drm/amd/display/dc/dcn20/dcn20_hubp.c | 30 ++++
.../drm/amd/display/dc/dcn20/dcn20_hwseq.c | 12 +-
.../gpu/drm/amd/display/dc/dcn20/dcn20_optc.c | 1 +
.../gpu/drm/amd/display/dc/dcn30/dcn30_dpp.c | 4 +
.../gpu/drm/amd/display/dc/dcn30/dcn30_optc.c | 2 +-
.../gpu/drm/amd/display/dc/dcn31/dcn31_optc.c | 1 -
.../amd/display/dc/dcn314/dcn314_resource.c | 3 +-
.../dc/dcn32/dcn32_dio_stream_encoder.h | 11 +-
.../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 3 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_optc.c | 2 +-
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 7 +
.../display/dc/dcn32/dcn32_resource_helpers.c | 2 +-
.../drm/amd/display/dc/dml/dcn31/dcn31_fpu.c | 9 +-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 9 +-
.../dc/dml/dcn32/display_mode_vba_32.c | 2 +
.../gpu/drm/amd/display/dc/inc/core_types.h | 4 +
.../gpu/drm/amd/display/dc/inc/hw/clk_mgr.h | 15 +-
.../amd/display/dc/inc/hw/cursor_reg_cache.h | 98 ++++++++++
drivers/gpu/drm/amd/display/dc/inc/hw/dpp.h | 4 +
drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h | 5 +
drivers/gpu/drm/amd/display/dc/inc/resource.h | 6 +
.../amd/display/dc/link/link_hwss_hpo_dp.c | 2 +-
drivers/gpu/drm/amd/display/dmub/dmub_srv.h | 1 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 140 +++++++++++++--
.../gpu/drm/amd/display/dmub/src/dmub_dcn31.c | 1 +
38 files changed, 635 insertions(+), 268 deletions(-) create mode 100644 drivers/gpu/drm/amd/display/dc/inc/hw/cursor_reg_cache.h
--
2.25.1
