[Public]
Hi all,
This week this patchset was tested on the following systems:
Lenovo Thinkpad T14s Gen2, with AMD Ryzen 5 5650U
Reference AMD RX6800
Engineering board with Ryzen 9 5900H
These systems were tested on the following display types:
eDP, (1080p 60hz [4500U, 5650U, 5900H])
VGA and DVI (1680x1050 60HZ [DP to VGA/DVI, USB-C to DVI/VGA])
DP/HDMI/USB-C (1440p 170hz, 4k 60hz, 4k 144hz [Includes USB-C to DP/HDMI adapters])
MST tested with Startech MST14DP123DP and 2x 4k 60Hz displays
DSC tested with Cable Matters 101075 (DP to 3x DP), and 201375 (USB-C to 3x DP) with 3x 4k60 displays
The testing is a mix of automated and manual tests. Manual testing includes (but is not limited to):
Changing display configurations and settings
Benchmark testing
Feature testing (Freesync, etc.)
Automated testing includes (but is not limited to):
Script testing (scripts to automate some of the manual checks)
IGT testing
The patchset consists of the amd-staging-drm-next branch (Head commit - 54065fc1526389eac66fd90abc51fa97b12c0186 -> drm/amdgpu: Fix amdgpu_vm_pt_free warning) with new patches added on top of it. This branch is used for both Ubuntu and Chrome OS testing (ChromeOS on a bi-weekly basis).
Tested on Ubuntu 22.04 and Chrome OS
Tested-by: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Thank you,
Dan Wheeler
Sr. Technologist | AMD
SW Display
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1 Commerce Valley Dr E, Thornhill, ON L3T 7X6
amd.com
-----Original Message-----
From: Dhillon, Jasdeep <Jasdeep.Dhillon@xxxxxxx>
Sent: September 21, 2022 8:18 PM
To: amd-gfx@xxxxxxxxxxxxxxxxxxxxx
Cc: Wentland, Harry <Harry.Wentland@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Lakha, Bhawanpreet <Bhawanpreet.Lakha@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; Pillai, Aurabindo <Aurabindo.Pillai@xxxxxxx>; Zhuo, Qingqing (Lillian) <Qingqing.Zhuo@xxxxxxx>; Li, Roman <Roman.Li@xxxxxxx>; Lin, Wayne <Wayne.Lin@xxxxxxx>; Wang, Chao-kai (Stylon) <Stylon.Wang@xxxxxxx>; Chiu, Solomon <Solomon.Chiu@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx>; Gutierrez, Agustin <Agustin.Gutierrez@xxxxxxx>; Dhillon, Jasdeep <Jasdeep.Dhillon@xxxxxxx>; Wheeler, Daniel <Daniel.Wheeler@xxxxxxx>
Subject: [PATCH 00/31] DC Patches Sept 26, 2022
This DC patchset brings improvements in multiple areas. In summary, we have:
- LTTPR mode can be be dynamically changed
- features able to use same interface to update cursor info
- fixes for llvm compilation issues
- Fixes DIO FIFO underflow and other FIFO errors
- Partially valid EDIDs handled properly
- Phatom pipes are skipped when checking pending flip
- Fixed audio on display after unplugging
Cc: Daniel Wheeler <daniel.wheeler@xxxxxxx>
Alvin Lee (4):
drm/amd/display: Update DCN32 to use new SR latencies
drm/amd/display: Update MALL SS NumWays calculation
drm/amd/display: Disable MALL when TMZ surface
drm/amd/display: Fix CAB allocation calculation
Aric Cyr (3):
drm/amd/display: Remove interface for periodic interrupt 1
drm/amd/display: Fix audio on display after unplugging another
drm/amd/display: 3.2.205
Aurabindo Pillai (2):
drm/amd/display: skip phantom pipes when checking for pending flip
drm/amd/display: fix a divide by zero error
Brandon Syu (1):
Add debug option for exiting idle optimizations on cursor updates
Charlene Liu (1):
drm/amd/display: add debug keys for override bios settings.
Dillon Varone (1):
drm/amd/display: Fix various dynamic ODM transitions on DCN32
Eric Bernstein (1):
drm/amd/display: Remove assert for odm transition case
Ian Chen (1):
Add ABM control to panel_config struct.
Ilya Bakoulin (1):
drm/amd/display: Change EDID fallback condition
Max Tseng (1):
drm/amd/display: Cursor Info Update refactor
Michael Strauss (1):
drm/amd/display: Refactor LTTPR mode selection
Nathan Chancellor (2):
drm/amd/display: Reduce number of arguments of dml314's
CalculateWatermarksAndDRAMSpeedChangeSupport()
drm/amd/display: Reduce number of arguments of dml314's
CalculateFlipSchedule()
Nicholas Kazlauskas (3):
drm/amd/display: Wrap OTG disable workaround with FIFO control
drm/amd/display: Add explicit FIFO disable for DP blank
drm/amd/display: Do DIO FIFO enable after DP video stream enable
Samson Tam (1):
drm/amd/display: fill in clock values when DPM is not enabled
Taimur Hassan (3):
drm/amd/display: Avoid avoid unnecessary pixel rate divider
programming
drm/amd/display: Fix typo in get_pixel_rate_div
drm/amd/display: Avoid unnecessary pixel rate divider programming
Tom Rix (3):
drm/amd/display: remove redundant CalculateTWait's
drm/amd/display: refactor CalculateWriteBackDelay to use vba_vars_st
ptr
drm/amd/display: remove redundant CalculateRemoteSurfaceFlipDelay's
Wenjing Liu (2):
drm/amd/display: add missing null check
drm/amd/display: polling vid stream status in hpo dp blank
.../drm/amd/display/dc/bios/bios_parser2.c | 21 +-
.../dc/clk_mgr/dcn314/dcn314_clk_mgr.c | 11 +-
.../display/dc/clk_mgr/dcn32/dcn32_clk_mgr.c | 14 +
drivers/gpu/drm/amd/display/dc/core/dc.c | 127 +++--
.../gpu/drm/amd/display/dc/core/dc_link_ddc.c | 19 + .../gpu/drm/amd/display/dc/core/dc_link_dp.c | 301 ++++++-----
.../drm/amd/display/dc/core/dc_link_dpia.c | 34 +-
.../gpu/drm/amd/display/dc/core/dc_stream.c | 1 +
drivers/gpu/drm/amd/display/dc/dc.h | 8 +-
drivers/gpu/drm/amd/display/dc/dc_link.h | 7 +-
drivers/gpu/drm/amd/display/dc/dc_stream.h | 6 +-
.../display/dc/dce110/dce110_hw_sequencer.c | 6 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.c | 35 +-
.../amd/display/dc/dcn10/dcn10_hw_sequencer.h | 3 +-
.../drm/amd/display/dc/dcn30/dcn30_resource.c | 3 +-
.../amd/display/dc/dcn301/dcn301_resource.c | 1 +
.../amd/display/dc/dcn302/dcn302_resource.c | 3 +-
.../amd/display/dc/dcn303/dcn303_resource.c | 1 +
.../dc/dcn31/dcn31_hpo_dp_stream_encoder.c | 6 +-
.../drm/amd/display/dc/dcn314/dcn314_dccg.c | 47 ++
.../dc/dcn314/dcn314_dio_stream_encoder.c | 25 +-
.../gpu/drm/amd/display/dc/dcn32/dcn32_dccg.c | 53 ++
.../drm/amd/display/dc/dcn32/dcn32_hubbub.c | 10 +-
.../drm/amd/display/dc/dcn32/dcn32_hwseq.c | 280 ++++++----
.../drm/amd/display/dc/dcn32/dcn32_hwseq.h | 8 +
.../gpu/drm/amd/display/dc/dcn32/dcn32_init.c | 2 +
.../drm/amd/display/dc/dcn32/dcn32_resource.c | 27 +-
.../display/dc/dcn32/dcn32_resource_helpers.c | 2 +-
.../amd/display/dc/dcn321/dcn321_resource.c | 3 +
.../dc/dml/dcn20/display_mode_vba_20.c | 98 +---
.../dc/dml/dcn20/display_mode_vba_20v2.c | 176 +-----
.../dc/dml/dcn21/display_mode_vba_21.c | 173 +-----
.../dc/dml/dcn30/display_mode_vba_30.c | 92 +---
.../dc/dml/dcn31/display_mode_vba_31.c | 89 +--
.../dc/dml/dcn314/display_mode_vba_314.c | 509 ++++--------------
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 70 ++-
.../drm/amd/display/dc/dml/dcn32/dcn32_fpu.h | 2 +
.../dc/dml/dcn32/display_mode_vba_32.c | 42 +-
.../dc/dml/dcn32/display_mode_vba_util_32.c | 30 --
.../dc/dml/dcn32/display_mode_vba_util_32.h | 10 +-
.../gpu/drm/amd/display/dc/inc/dc_link_dp.h | 5 +
.../amd/display/dc/inc/hw/clk_mgr_internal.h | 2 +
.../gpu/drm/amd/display/dc/inc/hw_sequencer.h | 9 +-
.../amd/display/dc/inc/hw_sequencer_private.h | 2 +
.../gpu/drm/amd/display/dmub/inc/dmub_cmd.h | 5 +
.../amd/display/include/link_service_types.h | 1 +
scripts/extract-cert | Bin 0 -> 18320 bytes
47 files changed, 952 insertions(+), 1427 deletions(-) create mode 100755 scripts/extract-cert
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2.25.1
