Applied. Thanks! Alex On Mon, Aug 29, 2022 at 8:13 AM <cgel.zte@xxxxxxxxx> wrote: > > From: Jinpeng Cui <cui.jinpeng2@xxxxxxxxxx> > > Return value from expression directly instead of > taking this in another redundant variable. > > Reported-by: Zeal Robot <zealci@xxxxxxxxxx> > Signed-off-by: Jinpeng Cui <cui.jinpeng2@xxxxxxxxxx> > --- > drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 5 +---- > 1 file changed, 1 insertion(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > index 37246e965457..8f4f1ea447a7 100644 > --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c > @@ -3741,7 +3741,6 @@ int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx) > int vesa_sync_start; > int asic_blank_end; > int interlace_factor; > - int vertical_line_start; > > patched_crtc_timing = *dc_crtc_timing; > apply_front_porch_workaround(&patched_crtc_timing); > @@ -3757,10 +3756,8 @@ int dcn10_get_vupdate_offset_from_vsync(struct pipe_ctx *pipe_ctx) > patched_crtc_timing.v_border_top) > * interlace_factor; > > - vertical_line_start = asic_blank_end - > + return asic_blank_end - > pipe_ctx->pipe_dlg_param.vstartup_start + 1; > - > - return vertical_line_start; > } > > void dcn10_calc_vupdate_position( > -- > 2.25.1 >
