On Fri, Aug 26, 2022 at 11:48 AM Alex Sierra <alex.sierra@xxxxxxx> wrote: > > [Why] Devices with CPU XGMI iolink do not support PCIe peer access. > > Signed-off-by: Alex Sierra <alex.sierra@xxxxxxx> Acked-by: Alex Deucher <alexander.deucher@xxxxxxx> > --- > drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > index ce7d117efdb5..1ff66718639d 100644 > --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c > @@ -5538,7 +5538,8 @@ bool amdgpu_device_is_peer_accessible(struct amdgpu_device *adev, > return pcie_p2p && p2p_access && (adev->gmc.visible_vram_size && > adev->gmc.real_vram_size == adev->gmc.visible_vram_size && > !(adev->gmc.aper_base & address_mask || > - aper_limit & address_mask)); > + aper_limit & address_mask) && > + !adev->gmc.xgmi.connected_to_cpu); > #else > return false; > #endif > -- > 2.32.0 >
