On 2022-07-05 15:53, Harry Wentland wrote:
On 2022-06-28 17:26, Aurabindo Pillai wrote:
[Why&How]
Expose a new debugfs enum to force a subviewport memory clock switch
to facilitate easy testing.
Does this force a single switch? Or at regular intervals?
If this debug option is set, each time a MCLK switch happens, a SubVP
sequences shall be initiated. That is, during the MCLK switch the
scanout shall be from the Subviewport memory. Setting this option doesnt
trigger an MCLK switch though.
It would be useful to describe a bit better what it does.
Will keep that in mind, thanks! Unfortunately I merged it already since
I got the ack last week.
Signed-off-by: Aurabindo Pillai <aurabindo.pillai@xxxxxxx>
Either way, since this is for debug purposes only this is
Reviewed-by: Harry Wentland <harry.wentland@xxxxxxx>
Harry
---
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 3 +++
drivers/gpu/drm/amd/include/amd_shared.h | 1 +
2 files changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index c9145864ed2b..7a034ca95be2 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1559,6 +1559,9 @@ static int amdgpu_dm_init(struct amdgpu_device *adev)
if (amdgpu_dc_debug_mask & DC_DISABLE_CLOCK_GATING)
adev->dm.dc->debug.disable_clock_gate = true;
+ if (amdgpu_dc_debug_mask & DC_FORCE_SUBVP_MCLK_SWITCH)
+ adev->dm.dc->debug.force_subvp_mclk_switch = true;
+
r = dm_dmub_hw_init(adev);
if (r) {
DRM_ERROR("DMUB interface failed to initialize: status=%d\n", r);
diff --git a/drivers/gpu/drm/amd/include/amd_shared.h b/drivers/gpu/drm/amd/include/amd_shared.h
index bcdf7453a403..b1c55dd7b498 100644
--- a/drivers/gpu/drm/amd/include/amd_shared.h
+++ b/drivers/gpu/drm/amd/include/amd_shared.h
@@ -247,6 +247,7 @@ enum DC_DEBUG_MASK {
DC_DISABLE_DSC = 0x4,
DC_DISABLE_CLOCK_GATING = 0x8,
DC_DISABLE_PSR = 0x10,
+ DC_FORCE_SUBVP_MCLK_SWITCH = 0x20,
};
enum amd_dpm_forced_level;
