From: Harry VanZyllDeJong <harry.vanzylldejong@xxxxxxx>
[WHY]
Game performace may be affected if dynamic memory clock switching
is enabled while playing games.
[HOW]
Propagate the vrr active state to dirty bit so that on mode set it
disables dynamic memory clock switching.
Acked-by: Alan Liu <HaoPing.Liu@xxxxxxx>
Signed-off-by: Harry VanZyllDeJong <harry.vanzylldejong@xxxxxxx>
---
drivers/gpu/drm/amd/display/dc/core/dc.c | 3 +++
drivers/gpu/drm/amd/display/dc/dc_stream.h | 1 +
drivers/gpu/drm/amd/display/modules/freesync/freesync.c | 2 +-
drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h | 3 +--
4 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc.c b/drivers/gpu/drm/amd/display/dc/core/dc.c
index 7c2b65226131..49339c5c7230 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc.c
@@ -2652,6 +2652,9 @@ static void copy_stream_update_to_stream(struct dc *dc,
if (update->allow_freesync)
stream->allow_freesync = *update->allow_freesync;
+ if (update->vrr_active_variable)
+ stream->vrr_active_variable = *update->vrr_active_variable;
+
if (update->crtc_timing_adjust)
stream->adjust = *update->crtc_timing_adjust;
diff --git a/drivers/gpu/drm/amd/display/dc/dc_stream.h b/drivers/gpu/drm/amd/display/dc/dc_stream.h
index ae9382ce82d3..5a894c19b0ea 100644
--- a/drivers/gpu/drm/amd/display/dc/dc_stream.h
+++ b/drivers/gpu/drm/amd/display/dc/dc_stream.h
@@ -304,6 +304,7 @@ struct dc_stream_update {
bool *dpms_off;
bool integer_scaling_update;
bool *allow_freesync;
+ bool *vrr_active_variable;
struct colorspace_transform *gamut_remap;
enum dc_color_space *output_color_space;
diff --git a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
index aa121d45d9b8..0686223034de 100644
--- a/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
+++ b/drivers/gpu/drm/amd/display/modules/freesync/freesync.c
@@ -1374,7 +1374,7 @@ unsigned long long mod_freesync_calc_field_rate_from_timing(
return field_rate_in_uhz;
}
-bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr, struct dc_stream_state *const pStream)
+bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr)
{
return (pVrr->state != VRR_STATE_UNSUPPORTED) && (pVrr->state != VRR_STATE_DISABLED);
}
diff --git a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
index 62e326dd29a8..afe1f6cce528 100644
--- a/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
+++ b/drivers/gpu/drm/amd/display/modules/inc/mod_freesync.h
@@ -195,7 +195,6 @@ unsigned int mod_freesync_calc_v_total_from_refresh(
unsigned int refresh_in_uhz);
// Returns true when FreeSync is supported and enabled (even if it is inactive)
-bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr,
- struct dc_stream_state *const pStream);
+bool mod_freesync_get_freesync_enabled(struct mod_vrr_params *pVrr);
#endif
--
2.36.1
