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On Thu, May 26, 2022 at 1:58 PM Alex Deucher <alexander.deucher@xxxxxxx> wrote:
>
> Enable the AGP aperture on chips with GMC v11.
>
> Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
> ---
> drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c | 7 ++++---
> drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c | 1 +
> drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c | 6 +++---
> drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c | 6 +++---
> 4 files changed, 11 insertions(+), 9 deletions(-)
>
> diff --git a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> index 5eccaa2c7ca0..f99d7641bb21 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gfxhub_v3_0.c
> @@ -154,10 +154,11 @@ static void gfxhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
> {
> uint64_t value;
>
> - /* Disable AGP. */
> + /* Program the AGP BAR */
> WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0);
> - WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, 0);
> - WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, 0x00FFFFFF);
> + WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> + WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
> +
>
> /* Program the system aperture low logical page number. */
> WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR,
> diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> index b6daa4146dd3..635103c7e2a0 100644
> --- a/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v11_0.c
> @@ -654,6 +654,7 @@ static void gmc_v11_0_vram_gtt_location(struct amdgpu_device *adev,
>
> amdgpu_gmc_vram_location(adev, &adev->gmc, base);
> amdgpu_gmc_gart_location(adev, mc);
> + amdgpu_gmc_agp_location(adev, mc);
>
> /* base offset of vram pages */
> adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev);
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> index bc11b2de37ae..4926fa82c1c4 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0.c
> @@ -169,10 +169,10 @@ static void mmhub_v3_0_init_system_aperture_regs(struct amdgpu_device *adev)
> uint64_t value;
> uint32_t tmp;
>
> - /* Disable AGP. */
> + /* Program the AGP BAR */
> WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
> - WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
> - WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
> + WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> + WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>
> if (!amdgpu_sriov_vf(adev)) {
> /*
> diff --git a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> index 770be0a8f7ce..5e5b884d8357 100644
> --- a/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> +++ b/drivers/gpu/drm/amd/amdgpu/mmhub_v3_0_2.c
> @@ -162,10 +162,10 @@ static void mmhub_v3_0_2_init_system_aperture_regs(struct amdgpu_device *adev)
> uint64_t value;
> uint32_t tmp;
>
> - /* Disable AGP. */
> + /* Program the AGP BAR */
> WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0);
> - WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, 0);
> - WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, 0x00FFFFFF);
> + WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24);
> + WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24);
>
> if (!amdgpu_sriov_vf(adev)) {
> /*
> --
> 2.35.3
>
