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[Public]
DCN 3.1.6 needs it, but I don't know if yellow carp needs it. I think this is only applicable to kernel 5.18.
@Kazlauskas, Nicholas can you verify?
Alex
From: VURDIGERENATARAJ, CHANDAN <CHANDAN.VURDIGERENATARAJ@xxxxxxx>
Sent: Wednesday, May 18, 2022 8:36 AM To: Sasha Levin <sashal@xxxxxxxxxx>; linux-kernel@xxxxxxxxxxxxxxx <linux-kernel@xxxxxxxxxxxxxxx>; stable@xxxxxxxxxxxxxxx <stable@xxxxxxxxxxxxxxx> Cc: Yang, Eric <Eric.Yang2@xxxxxxx>; haonan.wang2@xxxxxxx <haonan.wang2@xxxxxxx>; Li, Sun peng (Leo) <Sunpeng.Li@xxxxxxx>; Pan, Xinhui <Xinhui.Pan@xxxxxxx>; Siqueira, Rodrigo <Rodrigo.Siqueira@xxxxxxx>; amd-gfx@xxxxxxxxxxxxxxxxxxxxx <amd-gfx@xxxxxxxxxxxxxxxxxxxxx>; Koenig, Christian <Christian.Koenig@xxxxxxx>; airlied@xxxxxxxx <airlied@xxxxxxxx>; dri-devel@xxxxxxxxxxxxxxxxxxxxx <dri-devel@xxxxxxxxxxxxxxxxxxxxx>; daniel@xxxxxxxx <daniel@xxxxxxxx>; wyatt.wood@xxxxxxx <wyatt.wood@xxxxxxx>; Deucher, Alexander <Alexander.Deucher@xxxxxxx>; mikita.lipski@xxxxxxx <mikita.lipski@xxxxxxx>; Wentland, Harry <Harry.Wentland@xxxxxxx>; Kazlauskas, Nicholas <Nicholas.Kazlauskas@xxxxxxx>; Kotarac, Pavle <Pavle.Kotarac@xxxxxxx> Subject: RE: [PATCH AUTOSEL 5.17 13/23] drm/amd/display: undo clearing of z10 related function pointers Hi,
Is S0i3 verified for DCN 3.1.6 with this? BR, Chandan V N >From: Eric Yang <Eric.Yang2@xxxxxxx> > >[ Upstream commit 9b9bd3f640640f94272a461b2dfe558f91b322c5 ] > > [Why] >Z10 and S0i3 have some shared path. Previous code clean up , incorrectly removed these pointers, which breaks s0i3 restore > > [How] >Do not clear the function pointers based on Z10 disable. > >Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@xxxxxxx> >Acked-by: Pavle Kotarac <Pavle.Kotarac@xxxxxxx> >Signed-off-by: Eric Yang <Eric.Yang2@xxxxxxx> >Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx> >Signed-off-by: Sasha Levin <sashal@xxxxxxxxxx> >--- > drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c | 5 ----- > 1 file changed, 5 deletions(-) > >diff --git a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c >index d7559e5a99ce..e708f07fe75a 100644 >--- a/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c >+++ b/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_init.c >@@ -153,9 +153,4 @@ void dcn31_hw_sequencer_construct(struct dc *dc) > dc->hwss.init_hw = dcn20_fpga_init_hw; > dc->hwseq->funcs.init_pipes = NULL; > } >- if (dc->debug.disable_z10) { >- /*hw not support z10 or sw disable it*/ >- dc->hwss.z10_restore = NULL; >- dc->hwss.z10_save_init = NULL; >- } > } >-- >2.35.1 > |
