On 06/05/2022, Amol <suratiamol@xxxxxxxxx> wrote: > Hello, > > While trying to program the HD 7350 Cedar GPU to run with DPM > under the 157MHz/200MHz sclk/mclk powerstate, for single_display, > and with forced LOW performance on the SMC, the DMA ring seems > to hang. > . . . . . . > > Does this mean that the GPU doesn't support running DMA ring at the > lowest perf profile (157Mhz/200MHz)? I do still believe that this > situation might be a result of faulty/missing programming on my part, > though I am not sure what exactly it is that is at fault or is missing. The mc_reg_table was being populated with invalid entries. Thanks, Amol
