From: Evan Quan <evan.quan@xxxxxxx>
Fulfill the interface for gfx ulv control.
Signed-off-by: Evan Quan <evan.quan@xxxxxxx>
Reviewed-by: Likun Gao <Likun.Gao@xxxxxxx>
Signed-off-by: Alex Deucher <alexander.deucher@xxxxxxx>
---
drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h | 3 +++
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 11 +++++++++++
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c | 2 ++
3 files changed, 16 insertions(+)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
index e33686a12df2..39b51f7a2c1d 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
+++ b/drivers/gpu/drm/amd/pm/swsmu/inc/smu_v13_0.h
@@ -278,5 +278,8 @@ int smu_v13_0_run_btc(struct smu_context *smu);
int smu_v13_0_deep_sleep_control(struct smu_context *smu,
bool enablement);
+int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
+ bool enablement);
+
#endif
#endif
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index da458e146252..4729cdcdb210 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -2184,3 +2184,14 @@ int smu_v13_0_deep_sleep_control(struct smu_context *smu,
return ret;
}
+
+int smu_v13_0_gfx_ulv_control(struct smu_context *smu,
+ bool enablement)
+{
+ int ret = 0;
+
+ if (smu_cmn_feature_is_supported(smu, SMU_FEATURE_GFX_ULV_BIT))
+ ret = smu_cmn_feature_set_enabled(smu, SMU_FEATURE_GFX_ULV_BIT, enablement);
+
+ return ret;
+}
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
index eda0f59f07ae..b410420178ae 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0_0_ppt.c
@@ -149,6 +149,7 @@ static struct cmn2asic_mapping smu_v13_0_0_feature_mask_map[SMU_FEATURE_COUNT] =
[SMU_FEATURE_DS_VCN_BIT] = {1, FEATURE_DS_VCN_BIT},
[SMU_FEATURE_DS_MP0CLK_BIT] = {1, FEATURE_SOC_MPCLK_DS_BIT},
[SMU_FEATURE_DS_MP1CLK_BIT] = {1, FEATURE_BACO_MPCLK_DS_BIT},
+ [SMU_FEATURE_GFX_ULV_BIT] = {1, FEATURE_GFX_ULV_BIT},
};
static struct cmn2asic_mapping smu_v13_0_0_table_map[SMU_TABLE_COUNT] = {
@@ -1580,6 +1581,7 @@ static const struct pptable_funcs smu_v13_0_0_ppt_funcs = {
.set_pp_feature_mask = smu_cmn_set_pp_feature_mask,
.set_tool_table_location = smu_v13_0_set_tool_table_location,
.deep_sleep_control = smu_v13_0_deep_sleep_control,
+ .gfx_ulv_control = smu_v13_0_gfx_ulv_control,
};
void smu_v13_0_0_set_ppt_funcs(struct smu_context *smu)
--
2.35.1
