[AMD Official Use Only - General]
From: Likun Gao <Likun.Gao@xxxxxxx>
Only V13.0.2 on SMU v13 will get 0 based max level from fw and increment by one, other ASIC will not need for this.
V2: replace the asic_type check with ip versioning check.
Signed-off-by: Likun Gao <Likun.Gao@xxxxxxx>
---
drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
index cf09e30bdfe0..e0514ce3ee57 100644
--- a/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
+++ b/drivers/gpu/drm/amd/pm/swsmu/smu13/smu_v13_0.c
@@ -1750,8 +1750,8 @@ int smu_v13_0_get_dpm_level_count(struct smu_context *smu,
int ret;
ret = smu_v13_0_get_dpm_freq_by_index(smu, clk_type, 0xff, value);
- /* FW returns 0 based max level, increment by one */
- if (!ret && value)
+ /* SMU v13.0.2 FW returns 0 based max level, increment by one for it */
+ if((smu->adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 2)) &&
+(!ret && value))
++(*value);
return ret;
--
2.25.1
